HD6473837H Renesas Electronics America, HD6473837H Datasheet - Page 229

IC H8 MCU OTP 60K 100QFP

HD6473837H

Manufacturer Part Number
HD6473837H
Description
IC H8 MCU OTP 60K 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Lr
Datasheet

Specifications of HD6473837H

Core Processor
H8/300L
Core Size
8-Bit
Speed
5MHz
Connectivity
SCI
Peripherals
LCD, PWM
Number Of I /o
84
Program Memory Size
60KB (60K x 8)
Program Memory Type
OTP
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Register Configuration
Table 9.15 shows the register configuration of timer G.
Table 9.15 Timer G Registers
Name
Timer mode register G
Timer counter G
Input capture register GF
Input capture register GR
9.6.2
Timer Counter G (TCG)
Timer counter G (TCG) is an 8-bit up-counter which is incremented by an input clock. The input
clock signal is selected by bits CKS1 and CKS0 in timer mode register G (TMG).
To use TCG as an input capture timer, set bit TMIG to 1 in PMR1; to use TCG as an interval
timer, clear bit TMIG to 0.* When TCG is used as an input capture timer, the TCG value can be
cleared at the rising edge, falling edge, or both edges of the input capture signal, depending on
settings in TMG.
When TCG overflows (goes from H'FF to H'00), if the timer overflow interrupt enable bit (OVIE)
is set to 1 in TMG, bit IRRTG in interrupt request register 2 (IRR2) is set to 1. If in addition bit
IENTG in interrupt enable register 2 (IENR2) is set to 1, a CPU interrupt is requested. Details on
interrupts are given in 3.3, Interrupts.
TCG cannot be read or written by the CPU.
Upon reset, TCG is initialized to H'00.
Note: * An input capture signal may be generated when TMIG is rewritten.
212
Bit
Initial value
Read/Write
Register Descriptions
TCG7
7
0
TCG6
6
0
Abbrev.
TMG
TCG
ICRGF
ICRGR
TCG5
5
0
TCG4
R/W
R/W
R
R
4
0
TCG3
Initial Value
H'00
H'00
H'00
H'00
3
0
TCG2
2
0
TCG1
Address
H'FFBC
H'FFBD
H'FFBE
1
0
TCG0
0
0

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