HD6473837H Renesas Electronics America, HD6473837H Datasheet - Page 80

• Manufacturer Part Number: HD6473837H
• Description: IC H8 MCU OTP 60K 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Lr

Specifications of HD6473837H

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 5MHz
• Connectivity: SCI
• Peripherals: LCD, PWM
• Number Of I /o: 84
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: OTP
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

3.1
Exception handling is performed in the H8/3834 Series when a reset or interrupt occurs. Table 3.1
shows the priorities of these two types of exception handling.
Table 3.1
Priority
High
Low
3.2
3.2.1
A reset is the highest-priority exception. The internal state of the CPU and the registers of the on-
chip peripheral modules are initialized.
3.2.2
As soon as the RES pin goes low, all processing is stopped and the H8/3834 enters the reset state.
To make sure the chip is reset properly, observe the following precautions.
If the MD0 pin is at the high level, reset exception handling begins when the RES pin is held low
for a given period, then returned to the high level. If the MD0 pin is low, however, when the RES
pin is held low for a given period and then returned to high level, the reset is not cleared
immediately. First the MD0 pin must go from low to high, then after 8,192 clock cycles the reset
is cleared and reset exception handling begins.
At power on: Hold the RES pin low until the clock pulse generator output stabilizes.
Resetting during operation: Hold the RES pin low for at least 10 system clock cycles.
Overview
Reset
Overview
Reset Sequence
Exception Source
Reset
Interrupt
Exception Handling Types and Priorities
Section 3 Exception Handling
Time of Start of Exception Handling
Exception handling starts as soon as the reset state is cleared
When an interrupt is requested, exception handling starts
after execution of the present instruction or the exception
handling in progress is completed
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