MCHC11F1CFNE3 Freescale Semiconductor, MCHC11F1CFNE3 Datasheet - Page 123

• Manufacturer Part Number: MCHC11F1CFNE3
• Description: IC MCU 8BIT 1K RAM 68-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MCHC11F1CFNE3

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 30
• Program Memory Type: ROMless
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 68-PLCC
• A/d Inputs: 8-Channel, 8-Bit
• Eeprom Memory: 512 Bytes
• Input Output: 30
• Interface: SCI/SPI
• Memory Type: EPROM
• Number Of Bits: 8
• Package Type: 68-pin PLCC
• Programmable Memory: 0 Bytes
• Timers: 3-16-bit
• Voltage, Range: 3-5.5 V
• Controller Family/series: 68HC11
• No. Of I/o's: 30
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 1KB
• Cpu Speed: 3MHz
• No. Of Timers: 1
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC11F
• Core: HC11
• Data Bus Width: 8 bit
• Program Memory Size: 512 B
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 3 MHz
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Size: -
• Lead Free Status / Rohs Status: RoHS Compliant part

PACTL — Pulse Accumulator Control
Bit 7 — Not implemented
PAEN — Pulse Accumulator System Enable
PAMOD — Pulse Accumulator Mode
PEDGE — Pulse Accumulator Edge Control
Bit 3 — Not implemented
I4/O5 — Input Capture 4/Output Compare 5
RTR[1:0] — RTI Interrupt Rate Selects
9.6.2 Pulse Accumulator Count Register
PACNT — Pulse Accumulator Count
TECHNICAL DATA
RESET:
Always reads zero
This bit has different meanings depending on the state of the PAMOD bit, as shown in
Table 9-6.
Always reads zero
Refer to 9.4 Real-Time Interrupt.
This 8-bit read/write register contains the count of external input events at the PAI in-
put, or the accumulated count. The PACNT is readable even if PAI is not active in gat-
ed time accumulation mode. The counter is not affected by reset and can be read or
written at any time. Counting is synchronized to the internal PH2 clock so that incre-
menting and reading occur during opposite half cycles.
0 = Pulse accumulator disabled
1 = Pulse accumulator enabled
0 = Event counter
1 = Gated time accumulation
0 = Output compare 5 function enable (No IC4)
1 = Input capture 4 function enable (No OC5)
Bit 7
Bit 7
Bit 7
—
0
Table 9-6 Pulse Accumulator Edge Detection Control
PAMOD
PAEN
0
0
1
1
6
0
6
6
Freescale Semiconductor, Inc.
For More Information On This Product,
PAMOD
PEDGE
5
0
5
5
0
1
0
1
Go to: www.freescale.com
TIMING SYSTEM
PEDGE
PAI falling edge increments the counter.
PAI rising edge increments the counter.
A zero on PAI inhibits counting.
A one on PAI inhibits counting.
4
0
4
4
—
0
3
3
3
Action on Clock
I4/O5
2
0
2
2
RTR1
1
0
1
1
RTR0
Bit 0
Bit 0
Bit 0
0
$1026
$1027
9-17