MCHC11F1CFNE3 Freescale Semiconductor, MCHC11F1CFNE3 Datasheet - Page 36

• Manufacturer Part Number: MCHC11F1CFNE3
• Description: IC MCU 8BIT 1K RAM 68-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MCHC11F1CFNE3

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 30
• Program Memory Type: ROMless
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 68-PLCC
• A/d Inputs: 8-Channel, 8-Bit
• Eeprom Memory: 512 Bytes
• Input Output: 30
• Interface: SCI/SPI
• Memory Type: EPROM
• Number Of Bits: 8
• Package Type: 68-pin PLCC
• Programmable Memory: 0 Bytes
• Timers: 3-16-bit
• Voltage, Range: 3-5.5 V
• Controller Family/series: 68HC11
• No. Of I/o's: 30
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 1KB
• Cpu Speed: 3MHz
• No. Of Timers: 1
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC11F
• Core: HC11
• Data Bus Width: 8 bit
• Program Memory Size: 512 B
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 3 MHz
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Size: -
• Lead Free Status / Rohs Status: RoHS Compliant part

3-12
Mnemonic
LDAA (opr)
LDAB (opr)
NEG (opr)
JMP (opr)
JSR (opr)
LDD (opr)
LDS (opr)
LDX (opr)
LDY (opr)
LSR (opr)
LSL (opr)
NEGA
NEGB
LSRD
LSLD
LSRA
LSRB
LSLA
LSLB
MUL
INY
Index Register
Multiply 8 by 8
Right Double
Memory Byte
Accumulator
Accumulator
Load Double
Accumulator
Complement
Complement
Complement
Logical Shift
Logical Shift
Logical Shift
Logical Shift
Logical Shift
Logical Shift
Logical Shift
Logical Shift
Left Double
Load Stack
Load Index
Load Index
Operation
Subroutine
Increment
Register
Register
Jump to
Right A
Right B
Pointer
Left A
Left B
Two’s
Two’s
Two’s
Jump
Load
Load
Right
Left
Y
A
B
D
X
Y
A
B
0
C
M
M : M + 1
0
0
0
b7
See Figure 3–2
See Figure 3–2
M : M + 1
M : M + 1
C
C
C
b7
Description
IY + 1
0 – M
A
b7
b7
b7
A
0 – A
0 – B
A
b7
b7
b7
A,M + 1
M
M
b0
Freescale Semiconductor, Inc.
b0
Table 3-2 Instruction Set (Sheet 4 of 6)
B
b7
b7
For More Information On This Product,
A
B
B
b0
b0
b0
b0
b0
b0
IY
B
D
M
A
B
SP
IX
IY
b0
b0
0
0
0
C
C
C
B
C
0
CENTRAL PROCESSING UNIT
A
A
A
A
A
B
B
B
B
B
A
B
A
B
A
B
Addressing
Go to: www.freescale.com
Mode
INH
EXT
IND,X
IND,Y
DIR
EXT
IND,X
IND,Y
IMM
IMM
IMM
DIR
EXT
IND,X
IND,Y
IMM
DIR
EXT
IND,X
IND,Y
IMM
DIR
EXT
IND,X
IND,Y
IMM
DIR
EXT
IND,X
IND,Y
EXT
IND,X
IND,Y
INH
INH
INH
EXT
IND,X
IND,Y
INH
INH
INH
INH
EXT
IND,X
IND,Y
INH
INH
DIR
EXT
IND,X
IND,Y
DIR
EXT
IND,X
IND,Y
18
18
18
18
18
18
18
CD
18
18
18
1A
18
18
18
18
Opcode
08
7E
6E
6E
9D
BD
86
96
A6
A6
C6
D6
E6
E6
CC
DC
EC
EC
8E
9E
AE
AE
CE
DE
EE
EE
CE
DE
FE
EE
EE
78
68
68
48
58
05
74
64
64
44
54
04
3D
70
60
60
40
50
AD
AD
B6
F6
FC
BE
FE
Instruction
hh ll
ff
ff
dd
hh ll
ff
ff
ii
dd
hh ll
ff
ff
ii
dd
hh ll
ff
ff
jj kk
dd
hh ll
ff
ff
jj kk
dd
hh ll
ff
ff
jj kk
dd
hh ll
ff
ff
jj kk
dd
hh ll
ff
ff
hh ll
ff
ff
hh ll
ff
ff
hh ll
ff
ff
Operand Cycles
—
—
—
—
—
—
—
—
—
—
10
4
3
3
4
5
6
6
7
2
3
4
4
5
2
3
4
4
5
3
4
5
5
6
3
4
5
5
6
3
4
5
5
6
4
5
6
6
6
6
6
7
2
2
3
6
6
7
2
2
3
6
6
7
2
2
—
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S
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X
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H
Condition Codes
TECHNICAL DATA
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I
MC68HC11F1
—
—
—
—
N
0
0
0
0
—
—
—
Z
—
—
—
—
V
0
0
0
0
0
0
—
—
—
—
—
—
—
—
—
C