ATA5428-PLQW Atmel, ATA5428-PLQW Datasheet - Page 47

• Manufacturer Part Number: ATA5428-PLQW
• Description: IC TXRX WIDEBND 433/868MHZ 48QFN
• Manufacturer: Atmel

Specifications of ATA5428-PLQW

• Frequency: 433MHz, 868MHz
• Data Rate - Maximum: 20kbps
• Modulation Or Protocol: ASK, FSK
• Applications: Alarm and Security Systems, RKE
• Power - Output: 10dBm
• Sensitivity: -112.5dBm
• Voltage - Supply: 2.4 V ~ 3.6 V or 4.4 V ~ 6.6 V
• Current - Receiving: 10.5mA
• Current - Transmitting: 10mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Product Depth (mm): 7mm
• Product Height (mm): 0.9mm
• Product Length (mm): 7mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Compliant
• Other names: ATA5428-PLQHCT; ATA5428-PLQHCT; ATA5428-PLQWCT

7.7
7.8
4841D–WIRE–10/07
Low Battery Indicator
Pin VAUX
The status bit Low_Batt is set to “1” if the voltage V
(typically).
Low_Batt is set to “0” if V
serial interface (see
Figure 7-5.
To switch the transceiver from OFF to AUX mode, the voltage V
3.5V (typically) (see
to low, and DVCC and the power supply for external devices VSOUT are switched on.
If V
After the voltage on pin VSOUT exceeds 2.3V (typically) and the start-up time of the XTO is
elapsed, the output clock on pin CLK is available. Because the enabling of pin CLK is asynchro-
nous, the first clock cycle may be incomplete. N_RESET is set to high if V
(typically) and the XTO is settled.
If the transceiver is in any active mode (IDLE, TX, RX, RX_Polling), a positive edge on pin VAUX
and V
an interrupt. If P_On_Aux is still “1” during the positive edge on pin VAUX no interrupt is issued.
P_On_Aux and the interrupt are deleted after reading the status register.
VAUX
VAUX
exceeds 3.5V (typically) the status bit P_On_Aux is set to “1” and an interrupt is issued.
> VS1 + 0.5V sets P_On_Aux to “1”. The state transition P_On_Aux 0
Timing Status Bit Low_Batt
Figure 5-3 on page
Figure 7-6 on page
ATA5423/ATA5425/ATA5428/ATA5429
VSOUT
exceeds V
V
Read Status Register
IDLE, AUX, TX, RX
VSOUT
RX Polling Mode
34).
48). If V
Low_Batt = 1
Thres_2
< 2.38V (typ)
or
?
Y
VAUX
and the status register is read via the 4-wire
exceeds 2V (typically) pin N_RESET is set
VSOUT
N
on pin VSOUT drops below 2.38V
VAUX
on pin VAUX must exceed
VSOUT
exceeds 2.38V
1 generates
47