XR20M1172IL32-F Exar Corporation, XR20M1172IL32-F Datasheet - Page 33
![no-image](/images/manufacturer_photos/0/2/243/exar_corporation_sml.jpg)
XR20M1172IL32-F
Manufacturer Part Number
XR20M1172IL32-F
Description
IC UART FIFO I2C/SPI 64B 32QFN
Manufacturer
Exar Corporation
Datasheet
1.XR20M1172IG28-F.pdf
(58 pages)
Specifications of XR20M1172IL32-F
Number Of Channels
2, DUART
Package / Case
32-VFQFN Exposed Pad
Features
*
Fifo's
64 Byte
Protocol
RS485
Voltage - Supply
1.62 V ~ 3.63 V
With Auto Flow Control
Yes
With Irda Encoder/decoder
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Data Rate
16 Mbps
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.62 V
Supply Current
250 uA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
No. Of Channels
2
Uart Features
Tx/Rx FIFO Counters
Supply Voltage Range
1.62V To 3.63V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
QFN
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XR20M1172IL32-F
Manufacturer:
EXAR/艾科嘉
Quantity:
20 000
REV. 1.0.1
LCR[5]: TX and RX Parity Select
If the parity bit is enabled, LCR BIT-5 selects the forced parity format.
•
•
•
LCR[6]: Transmit Break Enable
When enabled, the Break control bit causes a break condition to be transmitted (the TX output is forced to a
“space", LOW state). This condition remains, until disabled by setting LCR bit-6 to a logic 0.
•
•
LCR[7]: Baud Rate Divisors Enable
Baud rate generator divisor (DLL, DLM and DLD) enable.
•
•
The MCR register is used for controlling the serial/modem interface signals or general purpose inputs/outputs.
MCR[0]: DTR# Output
The DTR# pin is a modem control output. If the modem interface is not used, this output may be used as a
general purpose output.
•
•
MCR[1]: RTS# Output
The RTS# pin is a modem control output and may be used for automatic hardware flow control by enabled by
EFR bit-6. The RTS# pin can also be used for Auto RS485 Half-Duplex direction control enabled by FCTR bit-
3. If the modem interface is not used, this output may be used as a general purpose output.
•
•
4.7
LCR BIT-5 = logic 0, parity is not forced (default).
LCR BIT-5 = logic 1 and LCR BIT-4 = logic 0, parity bit is forced to a logical 1 for the transmit and receive
data.
LCR BIT-5 = logic 1 and LCR BIT-4 = logic 1, parity bit is forced to a logical 0 for the transmit and receive
data.
Logic 0 = No TX break condition (default).
Logic 1 = Forces the transmitter output (TX) to a “space”, LOW, for alerting the remote receiver of a line
break condition.
Logic 0 = Data registers are selected (default).
Logic 1 = Divisor latch registers are selected.
Logic 0 = Force DTR# output HIGH (default).
Logic 1 = Force DTR# output LOW.
Logic 0 = Force RTS# HIGH (default).
Logic 1 = Force RTS# LOW.
Modem Control Register (MCR) or General Purpose Outputs Control - Read/Write
LCR B
X
0
0
1
1
IT
-5 LCR B
X
0
1
0
1
IT
-4 LCR B
T
ABLE
0
1
1
1
1
11: P
IT
-3
ARITY SELECTION
33
TWO CHANNEL I2C/SPI UART WITH 64-BYTE FIFO
Forced parity to space, “0”
Force parity to mark, “1”
P
ARITY SELECTION
Even parity
Odd parity
No parity
XR20M1172