HPIXF1104BE.B1-994579 Cortina Systems Inc, HPIXF1104BE.B1-994579 Datasheet - Page 117

• Manufacturer Part Number: HPIXF1104BE.B1-994579
• Description: IC ETH MAC SPI3 4PORT 552-BGA
• Manufacturer: Cortina Systems Inc

Specifications of HPIXF1104BE.B1-994579

• Controller Type: Ethernet Controller, MAC
• Interface: SPI-3
• Voltage - Supply: 1.2V, 2.5V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 575-BCBGA Exposed Pad (552 Bumps)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: 1008-1020

IXF1104 MAC
Datasheet
278757, Revision 13.2
17 September 2008
Figure 32
5.9.1.3
5.9.2
Cortina Systems
Write Timing Diagram - Asynchronous Interface
CPU Timing Parameters
For information on the CPU interface Read and Write cycle AC timing parameters, refer to
Figure 47, CPU Interface Read Cycle AC Timing, on page
Write Cycle AC Timing, on page
on page
Endian
The Endian of the CPU interface may be changed to allow connection of various CPUs to
the IXF1104 4-Port Gigabit Ethernet Media Access Controller. The Endian selection is
determined by setting the Endian bit in the
The following describes Endianness control:
®
• There is a byte swapper between the internal 32-bit bus and the external 32-bit bus.
• In 8-bit or 16-bit mode operation, the byte packer/byte unpacker holding registers sink
• The
• The byte swapper causes the behavior seen in
IXF1104 4-Port Gigabit Ethernet Media Access Controller
and source data just like the 32-bit external bus in 32-bit mode.
data bits data[31:0].
UPX_DATA[31:0]
UPX_ADD[10:0]
CPU Interface ($0x508)
143.
UPX_WR_L
UPX_RD_L
UPX_CS_L
T
CAS
143, and
selects Big-Endian or Little-Endian mode.
Table 53, CPU Interface AC Signal Parameters,
CPU Interface
T
CWL
T
Table 36
CDWS
($0x508).
142,
for accessing a register with
T
Figure 48, CPU Interface
T
CDWD
CAH
T
CDWH
T
CYD
T
CWH
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