HPIXF1104BE.B1-994579 Cortina Systems Inc, HPIXF1104BE.B1-994579 Datasheet - Page 44
HPIXF1104BE.B1-994579
Manufacturer Part Number
HPIXF1104BE.B1-994579
Description
IC ETH MAC SPI3 4PORT 552-BGA
Manufacturer
Cortina Systems Inc
Specifications of HPIXF1104BE.B1-994579
Controller Type
Ethernet Controller, MAC
Interface
SPI-3
Voltage - Supply
1.2V, 2.5V, 3.3V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
575-BCBGA Exposed Pad (552 Bumps)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Other names
1008-1020
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IXF1104 MAC
Datasheet
278757, Revision 13.2
17 September 2008
Table 3
Cortina Systems
SPI3 Interface Signal Descriptions (Sheet 7 of 8)
®
MPHY
RVAL_0
RSOP_0
IXF1104 4-Port Gigabit Ethernet Media Access Controller
Signal Name
SPHY
RVAL_0
RVAL_1
RVAL_2
RVAL_3
RSOP_0
RSOP_1
RSOP_2
RSOP_3
Designator
Ball
C15
C18
B18
E19
F22
B16
E23
J18
Output
Output
Type
Standard
LVTTL
LVTTL
3.3 V
3.3 V
Description
Receive Data Valid.
RVAL indicates the validity of the receive
data signals. RVAL is Low between
transfers and assertion of RSX. It is also
Low when the IXF1104 MAC pauses a
transfer due to an empty receive FIFO.
When a transfer is paused by holding RENB
High, RVAL holds its value unchanged,
although no new data is present on
RDAT[31:0] until the transfer resumes.
When RVAL is High, the RDAT[31:0],
RMOD[1:0], RSOP, REOP, and RERR
signals are valid. When RVAL is Low, the
RDAT[31:0], RMOD[1:0], RSOP, REOP, and
RERR signals are invalid and must be
disregarded.
The RSX signal is valid only when RVAL is
Low.
32-bit Multi-PHY mode: RVAL_0 covers all
receive bits.
4 x 8 Single-PHY mode: The RVAL_0:3 bits
correspond to the per-port data and control
signals.
Receive Start of Packet.
RSOP indicates the start of a packet when
asserted with RVAL.
32-bit Multi-PHY mode: RSOP_0 covers all
32 bits.
4 x 8 Single-PHY mode: The RSOP_0:3 bits
correspond to the RDAT[7:0]_n channels.
Page 44
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