LFXP2-30E-5FN484C Lattice, LFXP2-30E-5FN484C Datasheet - Page 112
LFXP2-30E-5FN484C
Manufacturer Part Number
LFXP2-30E-5FN484C
Description
FPGA - Field Programmable Gate Array 30KLUTs 363 I/O Inst -on DSP 1.2V -5 Spd
Manufacturer
Lattice
Specifications of LFXP2-30E-5FN484C
Number Of Macrocells
29000
Number Of Programmable I/os
363
Data Ram Size
396288
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Package / Case
FPBGA-484
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFXP2-30E-5FN484C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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Table 8-8. IO_TYPE Attribute Values
OPENDRAIN
LVCMOS and LVTTL I/O standards can be set to open drain configuration by using the OPENDRAIN attribute.
Values: ON, OFF
Default: OFF
DRIVE
The DRIVE attribute will set the programmable drive strength for the output standards that have programmable
drive capability
DEFAULT
LVDS 2.5V
RSDS
Emulated LVDS 2.5V
Bus LVDS 2.5V
LVPECL 3.3V
HSTL18 Class I and II
Differential HSTL 18 Class I and II
HSTL 15 Class I
Differential HSTL 15 Class I
SSTL 33 Class I and II
Differential SSTL 33 Class I and II
SSTL 25 Class I and II
Differential SSTL 25 Class I and II
SSTL 18 Class I and II
Differential SSTL 18 Class I and II
LVTTL
3.3V LVCMOS
2.5V LVCMOS
1.8V LVCMOS
1.5V LVCMOS
1.2V LVCMOS
3.3V PCI
MLVDS
1. These differential standards are implemented by using a complementary
LVCMOS driver with external resistor pack.
sysIO Signaling Standard
8-8
LVCMOS25
LVDS25
RSDS
LVDS25E
BLVDS25
LVPECL33
HSTL18_I, HTSL18_II
HSTL18D_I, HSTL18D_II
HSTL15_I
HSTL15D_I
SSTL33_I, SSTL33_II
SSTL33D_I, SSTL3D_II
SSTL25_I,SSTL25_II
SSTL25D_I, SSTL25D_II
SSTL18_I, SSTL18_II
SSTL18D_I,SSTL18D_II
LVTTL33
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
LVCMOS12
PCI33
MLVDS
1
1
IO_TYPE
1
1
1
LatticeXP2 sysIO Usage Guide
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