LFXP2-30E-5FN484C Lattice, LFXP2-30E-5FN484C Datasheet - Page 314
![FPGA - Field Programmable Gate Array 30KLUTs 363 I/O Inst -on DSP 1.2V -5 Spd](/photos/16/15/161505/landingpagelatticexp2_sml.jpg)
LFXP2-30E-5FN484C
Manufacturer Part Number
LFXP2-30E-5FN484C
Description
FPGA - Field Programmable Gate Array 30KLUTs 363 I/O Inst -on DSP 1.2V -5 Spd
Manufacturer
Lattice
Specifications of LFXP2-30E-5FN484C
Number Of Macrocells
29000
Number Of Programmable I/os
363
Data Ram Size
396288
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Package / Case
FPBGA-484
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFXP2-30E-5FN484C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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Lattice Semiconductor
Table 16-8. SED Run Time
Sample Code
The following simple example code shows how to instantiate the SED. In the example the SED is always on and
always running, and the outputs of the SED hardware have been routed to FPGA output pins. Note that the SEDBA
primitive is part of ispLEVER 6.1 or later.
Basic SED VHDL Example
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity example is
end;
architecture behavioral of example is
end behavioral ;
port (
component
end component;
begin
generic (OSC_DIV : integer := 1); -- set SEDCLKIN divider
port (
isnt1: SEDBA
generic map (OSC_DIV=> “1”)
port map (
sed_done
sed_in_prog
sed_clk_out
sed_out
SEDENABLE
SEDSTART
SEDFRCERRN
SEDERR
SEDDONE
SEDINPROG
SEDCLKOUT
SEDENABLE
SEDSTART
SEDFRCERRN
SEDERR
SEDDONE
SEDINPROG
SEDCLKOUT
SEDBA -- SED component
Density
3.1MHz
2.5MHz
Device
66MHz
50MHz
: out std_logic;
: out std_logic;
: out std_logic;
: out std_logic);
: in std_logic;
: in std_logic;
: in std_logic;
: out std_logic;
: out std_logic;
: out std_logic;
: out std_logic) ;
=> '1',
=> '1',
=> '1',
=> sed_out,
=> sed_done,
=> sed_in_prog,
=> sed_clk_out ) ;
XP2-5K
1.236M
18.7ms
24.7ms
399ms
495ms
-- tied high
-- tied high
-- tied high
-- wired to an output
-- wired to an output
XP2-8K
1.954M
29.6ms
39.1ms
624ms
782ms
-- wired to an output
16-6
-- wired to an output
XP2-17K
3.636M
55.1ms
72.7ms
1.173s
1.455s
XP2-30K
119.3ms
5.964M
90.4ms
1.924s
2.395s
Detection Usage Guide
XP2-40K
126.2ms
166.1ms
8.304M
2.679s
3.325s
LatticeXP2 Soft Error
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