ISL6323EVAL1Z Intersil, ISL6323EVAL1Z Datasheet - Page 19

• Manufacturer Part Number: ISL6323EVAL1Z
• Description: EVAL BOARD 1 FOR ISL6323
• Manufacturer: Intersil

Specifications of ISL6323EVAL1Z

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Dynamic VID
The AMD processor does not step the output voltage
commands up or down to the target voltage, but instead
passes only the target voltage to the ISL6323 through either
the PVI or SVI interface. The ISL6323 manages the resulting
VID-on-the-Fly transition in a controlled manner, supervising
a safe output voltage transition without discontinuity or
disruption. The ISL6323 begins slewing the DAC at
3.25mV/µs until the DAC and target voltage are equal. Thus,
the total time required for a dynamic VID transition is
dependent only on the size of the DAC change.
To further improve dynamic VID performance, ISL6323 also
implements a proprietary DAC smoothing feature. The
external series RC components connected between DVC
and FB limit any stair-stepping of the output voltage during a
VID-on-the-Fly transition.
Compensating Dynamic VID Transitions
During a VID transition, the resulting change in voltage on
the FB pin and the COMP pin causes an AC current to flow
through the error amplifier compensation components from
the FB to the COMP pin. This current then flows through the
feedback resistor, R
overshoot or undershoot at the end of the VID transition. In
order to ensure the smooth transition of the output voltage
during a VID change, a VID-on-the-fly compensation
network is required. This network is composed of a resistor
and capacitor in series, R
and the FB pin.
V
R
FIGURE 10. POSITIVE OFFSET OUTPUT VOLTAGE
OFS
OFS
+
-
V
OUT
GND
R
I
OFS
FB
OFS
FB
PROGRAMMING
ISL6323
FB
, and can cause the output voltage to
VREF
DVC
19
and C
DVC
+
-
+
-
, between the DVC
E/A
GND
+
-
+
-
0.3V
VCC
+
-
1.6V
ISL6323
This VID-on-the-fly compensation network works by
sourcing AC current into the FB node to offset the effects of
the AC current flowing from the FB to the COMP pin during a
VID transition. To create this compensation current the
ISL6323 sets the voltage on the DVC pin to be 2x the voltage
on the REF pin. Since the error amplifier forces the voltage
on the FB pin and the REF pin to be equal, the resulting
voltage across the series RC between DVC and FB is equal
to the REF pin voltage. The RC compensation components,
R
amount of compensation current.
The amount of compensation current required is dependant
on the modulator gain of the system, K1, and the error
amplifier RC components, R
between the FB and COMP pins. Use Equations 16, 17, and
18 to calculate the RC component values, R
for the VID-on-the-fly compensation network. For these
equations: V
is the oscillator ramp amplitude (1.5V); and R
the error amplifier RC components between the FB and
COMP pins.
Advanced Adaptive Zero Shoot-Through Deadtime
Control (Patent Pending)
The integrated drivers incorporate a unique adaptive deadtime
control technique to minimize deadtime, resulting in high
efficiency from the reduced freewheeling time of the lower
MOSFET body-diode conduction, and to prevent the upper and
lower MOSFETs from conducting simultaneously. This is
accomplished by ensuring either rising gate turns on its
MOSFET with minimum and sufficient delay after the other has
turned off.
K1
R
C
DVC
RCOMP
RCOMP
FIGURE 11. DYNAMIC VID COMPENSATION NETWORK
=
--------------- -
V
and C
V
P P
IN
VSEN
–
=
=
DVC
A
C
------- -
DVC
VDAC+RGND
IN
A
C
×
is the input voltage for the power train; V
R
, can then be selected to create the desired
C
C
A
DVC
=
2x
---------------- -
K1 1
I
DVC
K1
R
–
FB
R
DVC
C
and C
I
DVC
ISL6323 INTERNAL CIRCUIT
= I
C
FB
C
, that are in series
C
C
+
-
DVC
AMPLIFIER
C
I
ERROR
C
R
and C
C
October 21, 2008
and C
(EQ. 16)
(EQ. 17)
(EQ. 18)
COMP
C
FN9278.4
DVC
are
P-P
,