ISL6323EVAL1Z Intersil, ISL6323EVAL1Z Datasheet - Page 25

• Manufacturer Part Number: ISL6323EVAL1Z
• Description: EVAL BOARD 1 FOR ISL6323
• Manufacturer: Intersil

Specifications of ISL6323EVAL1Z

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Finally, the resistive part of the upper MOSFET is given in
Equation 26 as P
The total power dissipated by the upper MOSFET at full load
can now be approximated as the summation of the results
from Equations 23, 24, 25 and 26. Since the power
equations depend on MOSFET parameters, choosing the
correct MOSFETs can be an iterative process involving
repetitive solutions to the loss equations for different
MOSFETs and different switching frequencies.
Internal Bootstrap Device
All three integrated drivers feature an internal bootstrap
Schottky diode. Simply adding an external capacitor across
the BOOT and PHASE pins completes the bootstrap circuit.
The bootstrap function is also designed to prevent the
bootstrap capacitor from overcharging due to the large
negative swing at the PHASE node. This reduces voltage
stress on the boot to phase pins.
The bootstrap capacitor must have a maximum voltage
rating above PVCC + 4V and its capacitance value can be
chosen from Equation 27:
where Q
at V
control MOSFETs. The ΔV
allowable droop in the rail of the upper gate drive.
P
C
Q
UP 4 ( )
FIGURE 17. BOOTSTRAP CAPACITANCE vs BOOT RIPPLE
BOOT_CAP
GATE
GS1
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
≈
=
G1
r
0.0
gate-source voltage and N
DS ON
Q
----------------------------------- - N
20nC
G1
is the amount of gate charge per upper MOSFET
(
≥
V
0.1
VOLTAGE
------------------------------------- -
ΔV
•
GS1
)
PVCC
⋅
UP(4)
BOOT_CAP
Q
0.2
⎛
⎜
⎝
GATE
I
----- -
50nC
N
M
Q
⎞
⎟
⎠
GATE
.
•
2
0.3
⋅
d
Q1
BOOT_CAP
= 100nC
+
ΔV
0.4
I
--------- -
25
P-P
12
BOOT_CAP
0.5
2
Q1
0.6
term is defined as the
is the number of
(V)
0.7
0.8
0.9
(EQ. 26)
(EQ. 27)
1.0
ISL6323
Gate Drive Voltage Versatility
The ISL6323 provides the user flexibility in choosing the
gate drive voltage for efficiency optimization. The controller
ties the upper and lower drive rails together. Simply applying
a voltage from 5V up to 12V on PVCC sets both gate drive
rail voltages simultaneously.
Package Power Dissipation
When choosing MOSFETs it is important to consider the
amount of power being dissipated in the integrated drivers
located in the controller. Since there are a total of three
drivers in the controller package, the total power dissipated
by all three drivers must be less than the maximum
allowable power dissipation for the QFN package.
Calculating the power dissipation in the drivers for a desired
application is critical to ensure safe operation. Exceeding the
maximum allowable power dissipation level will push the IC
beyond the maximum recommended operating junction
temperature of +125°C. The maximum allowable IC power
dissipation for the 7x7 QFN package is approximately 3.5W
at room temperature. See “Layout Considerations” on
page 32 for thermal transfer improvement suggestions.
When designing the ISL6323 into an application, it is
recommended that the following calculations is used to
ensure safe operation at the desired frequency for the
selected MOSFETs. The total gate drive power losses,
P
integrated driver’s internal circuitry and their corresponding
average driver current can be estimated with Equations 28
and 29, respectively.
Where, P
P
charge (Q
source drive voltage PVCC in the corresponding MOSFET
data sheet; I
at both drive outputs; N
and lower MOSFETs per phase, respectively; N
I
P
DR
Qg_TOT
Qg_Q2
Qg_TOT
P
P
Qg_Q2
Qg_Q1
=
⎛
⎝
3
-- - Q
2
is the total lower gate drive power loss; the gate
, due to the gate charge of MOSFETs and the
Qg_Q1
⋅
G1
=
=
=
G1
Q
P
Q
and Q
3
-- - Q
2
Qg_Q1
is the driver total quiescent current with no load
G2
⋅
⋅
N
is the total upper gate drive power loss and
Q1
G1
⋅
PVCC f
G2
+
+
⋅
P
PVCC f
) is defined at the particular gate to
Q
Q1
Qg_Q2
G2
⋅
and N
⋅
SW
N
⋅
Q2
+
SW
⋅
I
N
⎞ N
⎠
Q
Q2
Q2
⋅
⋅
⋅
N
VCC
are the number of upper
PHASE
Q1
⋅
N
PHASE
⋅
N
PHASE
⋅
f
SW
PHASE
+
October 21, 2008
I
Q
(EQ. 29)
(EQ. 28)
FN9278.4
is the