NRF9E5 NORDIC SEMICONDUCTOR, NRF9E5 Datasheet - Page 39

• Manufacturer Part Number: NRF9E5
• Description: TRX, 430-928MHZ, MCU/ADC/PWM, SMD
• Manufacturer: NORDIC SEMICONDUCTOR

Specifications of NRF9E5

• Receiving Current: 12.5mA
• Transmitting Current: 30mA
• Data Rate: 50Kbps
• Frequency Range: 430MHz To 928MHz
• Modulation Type: GFSK
• Rf Ic Case Style: QFN
• No. Of Pins: 32
• Supply Voltage Range: 1.9V To
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PRODUCT SPECIFICATION
nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC
11.5 ADC – Configuration Register Description
11.6 Status Register Description
Main office: Nordic Semiconductor ASA - Vestre Rosten 81, N-7075 Tiller, Norway -Phone [phone] - Fax [phone]
Revision: 1.3
Parameter
Parameter
DIFFMODE,
ADC_PWR_
CSTARTN
RESCTRL
ADCRUN
RL_JUST
VFSSEL
CHSEL
ADC_
RFLAG
ADC_
UP
EOC
AM
CD
DR
Bitwidth
Bitwidth
1
1
1
1
4
2
1
1
1
1
1
1
3
Table 23 ADC Configuration-register description.
Description
Positive edge of this signal will start one AD conversion when ADCRUN is
inactive. This bit is internally synchronized to the ADC clock
ADC running continuously when active.
CSTARTN is ignored in this case
Enable ADC
Select reference for AD converter
0: Use internal band gap reference (nominally 1.22V)
1: Use external pin AREF for reference (ignored if CHSEL=[1xxx]).
Cannel select input
0000: AIN0
0001: AIN1
0010: AIN2
0011: AIN3
1xxx: internal VDD/3.
Set A/D converter resolution
00: 6 bit
01: 8 bit
10: 10 bit
11: 12 bit
Enable differential measurements, AIN0 must be used as inverting input and one of
the other inputs AIN1 to AIN3, as selected by ADCSEL, must be used as
noninverting input.
Select left or right justified data format:
0: Data will be left justified in ADC_DATA_REG
1: Data will be right justified in ADC_DATA_REG
Description
Address Match, indicate that the receiver has received an address equal to its own
identity.
Detailed description in chapter 9.8.
Carrier Detect, indicates that a carrier is found on the receiving channel. Detailed
description in chapter 9.7
Data Ready, indicate that the receiver has received a data packet with correct
address and CRC. Detailed description in chapter 9.9.
End Of Conversion, indicates that an AD conversion is completed and that data is
placed in ADC_DATA_REG.
Overflow indication in ADC
RFLAG[2]: Underflow (ADCDATA = 0)
RFLAG[1]: Overflow (ADCDATA = 2
RFLAG[0]: Over range = RFLAG[1] or RFLAG[2]
Table 24 Status-register description.
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June 2006