NRF9E5 NORDIC SEMICONDUCTOR, NRF9E5 Datasheet - Page 82

• Manufacturer Part Number: NRF9E5
• Description: TRX, 430-928MHZ, MCU/ADC/PWM, SMD
• Manufacturer: NORDIC SEMICONDUCTOR

Specifications of NRF9E5

• Receiving Current: 12.5mA
• Transmitting Current: 30mA
• Data Rate: 50Kbps
• Frequency Range: 430MHz To 928MHz
• Modulation Type: GFSK
• Rf Ic Case Style: QFN
• No. Of Pins: 32
• Supply Voltage Range: 1.9V To
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PRODUCT SPECIFICATION
nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC
18.8.3.3 16-Bit Timer/Counter Mode with Capture
The Timer 2 capture mode, illustrated in Figure 21 Timer 2 – Timer/Counter with
Capture, is the same as the 16-bit timer/counter mode, with the addition of the capture
registers and control signals. The CP/RL2 bit in the T2CON SFR enables the capture
feature. When CP/RL2 = 1, a high-to-low transition on t2ex when EXEN2 = 1 causes
the Timer 2 value to be loaded into the capture registers (RCAP2L and RCAP2H).
18.8.3.4 16-Bit Timer/Counter Mode with Auto-Reload
When CP/RL2 = 0, Timer 2 is configured for the auto-reload mode illustrated in Figure
22 Timer 2 – Timer/Counter with Auto-Reload. Control of counter input is the same as
for the other 16-bit counter modes. When the count increments from 0xFFFF, Timer 2
sets the TF2 flag and the starting value is reloaded into TL2 and TH2. The software
must preload the starting value into the RCAP2L and RCAP2H registers.
When Timer 2 is in auto-reload mode, a reload can be forced by a high-to-low transition
on the t2ex pin, if enabled by EXEN2 = 1.
Main office: Nordic Semiconductor ASA - Vestre Rosten 81, N-7075 Tiller, Norway -Phone [phone] - Fax [phone]
Revision: 1.3
SCK/T2
SCK/T2
Figure 22 Timer 2 – Timer/Counter with Auto-Reload.
Figure 21 Timer 2 – Timer/Counter with Capture.
CPU_CLK
TR2
EXEN2
LP_OSC
CPU_CLK
TR2
EXEN2
LP_OSC
Divide by 12
Divide by 4
Divide by 2
Divide by 12
Divide by 4
Divide by 2
Page 82 of 108
t2ex
t2ex
T2M
0
1
0
1
T2M
C/T2
C/T2
0
1
0
1
capture
reload
clk
clk
EXF2
EXF2
0
0
RCAP2L
0
0
RCAP2L
TL2
TL2
7
7
7
7
8
8
RCAP2H
8
8
RCAP2H
TH2
TF2
TH2
TF2
15
15
15
15
INT
INT
June 2006