NRF9E5 NORDIC SEMICONDUCTOR, NRF9E5 Datasheet - Page 56

• Manufacturer Part Number: NRF9E5
• Description: TRX, 430-928MHZ, MCU/ADC/PWM, SMD
• Manufacturer: NORDIC SEMICONDUCTOR

Specifications of NRF9E5

• Receiving Current: 12.5mA
• Transmitting Current: 30mA
• Data Rate: 50Kbps
• Frequency Range: 430MHz To 928MHz
• Modulation Type: GFSK
• Rf Ic Case Style: QFN
• No. Of Pins: 32
• Supply Voltage Range: 1.9V To
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PRODUCT SPECIFICATION
nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC
Typical sequences are:
Write: Wait until REGX_CRTL.4 == 0 (i.e. not busy)
Read: Wait until REGX_CRTL.4 == 0 (i.e. not busy)
Note : Please wait until not busy before accessing SFR 0xB6 CK_CTRL (page 60)
Table 45 below describe the functions of the SFR registers that control these blocks, and
Table 46 and Table 47 explains the contents of the individual control registers for
watchdog and wakeup functions.
Main office: Nordic Semiconductor ASA - Vestre Rosten 81, N-7075 Tiller, Norway -Phone [phone] - Fax [phone]
Revision: 1.3
Addr
SFR
(hex)
AB
AC
AD
TIC
K
Write REGX_MSB, Write REGX_LSB, Write REGX_CTRL
Write REGX_CTRL, Wait until REGX_CRTL.4 == 0 (i.e. not busy)
Read REGX_MSB, Read REGX_LSB
16-BIT
BUS
R/W
R/W
R/W
R/W
CE
Loa
d
REGX_CTRL
Figure 16 Block diagram of wakeup and watchdog function.
Table 45 Wakeup, RTC timer and Watchdog SFR-registers.
8-bit CPU
register
COUNTER
#bit
DOWN
16-BIT
8
8
5
Init
Hex
Zer
o
00
00
00
REGX_MSB
8-bit CPU
register
Name
REGX_MSB
REGX_LSB
REGX_CTRL
CE
Loa
Loa
d
d
COUNTER
Page 56 of 108
DOWN
24-BIT
TIMER_LATCH
8+16+4-BIT
REGISTER
REGX_LSB
8-bit CPU
register
Zer
o
Function
Most significant part of 16 bit register for
interface to Watchdog, RTC timer and GPIO
wakeup
Least significant part of 16 bit register for
interface to Watchdog, RTC timer and GPIO
wakeup
Control for 16 bit register for transfers to and
from Watchdog, RTC timer and GPIO wakeup.
4: REGX interface busy (read only).
3: Read (0) / Write (1)
2-0: Indirect address, see leftmost column in
Table 46
Start Out
4-BIT
CNT
GTIMER
P0_ALT.0
Clocked on CPU clock
Loa
d
RTC
WAKEUP
GPIO
WATCHDOG_RESET
OUT
WAKEUP & INT
on CKLF
Clocked
IO
P0.0 GPIO
P0 GPIO
June 2006