IPR-SRAM/QDRII Altera, IPR-SRAM/QDRII Datasheet - Page 15

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IPR-SRAM/QDRII

Manufacturer Part Number
IPR-SRAM/QDRII
Description
IP CORE Renewal Of IP-SRAM/QDRII
Manufacturer
Altera
Type
MegaCorer
Datasheets

Specifications of IPR-SRAM/QDRII

Software Application
IP CORE, Memory Controllers, SDRAM
Supported Families
HardCopy II, Stratix
Features
Automatic Concatenation Of Consecutive Reads And Writes, Easy-to-Use IP Toolbench Interface
Core Architecture
FPGA
Core Sub-architecture
HardCopy, Stratix
Rohs Compliant
NA
Function
QDRII SRAM Controller
License
Renewal License
Lead Free Status / RoHS Status
na
Lead Free Status / RoHS Status
na
Altera Corporation
November 2009
f
5.
6.
Step 1: Parameterize
To parameterize your MegaCore function, follow these steps:
1.
For more information on the parameters, refer to
page
2.
3.
The MegaWizard Plug-In Manager shows the project path that you
specified in the New Project Wizard. Append a variation name for
the MegaCore function output files <project path>\<variation name>.
1
Click Next to launch IP Toolbench.
Click Step 1: Parameterize in IP Toolbench.
Set the memory type:
a.
b.
c.
d.
e.
f.
g.
h.
i.
Set the memory interface.
a.
b.
c.
3–29).
Choose the Memory device.
Select either QDRII or QDRII+.
Set the Clock speed.
Choose the Voltage.
Choose the Burst length.
Choose the Data bus width.
Choose the Address bus width.
Choose the Memory Latency.
Select the Narrow mode or Wide mode to set the local bus
width.
Set Device width.
Set Device depth.
Turn off Use ALTDDIO pin, if you are targeting HardCopy II
devices.
MegaCore Version 9.1
The <variation name> must be a different name from the
project name and the top-level design entity name.
QDRII SRAM Controller MegaCore Function User Guide
“Parameters” on
Getting Started
2–5

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