IPR-SRAM/QDRII Altera, IPR-SRAM/QDRII Datasheet - Page 16

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IPR-SRAM/QDRII

Manufacturer Part Number
IPR-SRAM/QDRII
Description
IP CORE Renewal Of IP-SRAM/QDRII
Manufacturer
Altera
Type
MegaCorer
Datasheets

Specifications of IPR-SRAM/QDRII

Software Application
IP CORE, Memory Controllers, SDRAM
Supported Families
HardCopy II, Stratix
Features
Automatic Concatenation Of Consecutive Reads And Writes, Easy-to-Use IP Toolbench Interface
Core Architecture
FPGA
Core Sub-architecture
HardCopy, Stratix
Rohs Compliant
NA
Function
QDRII SRAM Controller
License
Renewal License
Lead Free Status / RoHS Status
na
Lead Free Status / RoHS Status
na
QDRII SRAM Controller Walkthrough
my_system:my_system_inst|sub_system:sub_system_inst|
2–6
QDRII SRAM Controller MegaCore Function User Guide
f
f
4.
For more information on board and controller parameters, refer to
“Board & Controller” on page
5.
6.
7.
8.
9.
For more information on the project settings, refer to
on page
10. Altera recommends that you turn on Automatically apply QDRII
11. Ensure Update the example design that instantiates the QDRII
12. Turn off Update example design system PLL, if you have edited the
13. The constraints script automatically detects the hierarchy of your
Click Board & Controller tab or Next.
Choose the number of pipeline registers.
To set the read latency, turn on Manual read latency setting and
specify the latency at Set latency to clock cycle.
Turn on the appropriate capture mode—DQS or non-DQS capture
mode. If you turn off Enable DQS mode (non-DQS capture mode),
you can turn on Use migratable bytegroups.
Enter the pin loading for the FPGA pins.
Click Project Settings tab or Next.
SRAM controller-specific constraints to the Quartus II project so
that the Quartus II software automatically applies the constraints
script when you compile the example design.
SRAM controller variation is turned on, for IP Toolbench to
automatically update the example design file.
PLL and you do not want the wizard to regenerate the PLL when
you regenerate the variation.
1
design. The constraints script analyzes and elaborates your design
to automatically extract the hierarchy to your variation. To prevent
the constraints script analyzing and elaborating your design, turn
on Enable hierarchy control, and enter the correct hierarchy path to
your variation. The hierarchy path is the path to your QDRII SRAM
controller, without the top-level name.
following example hierarchy:
3–33.
MegaCore Version 9.1
The first time you create a custom variation, you must turn
on Update example design system PLL.
3–31.
Figure 2–2
“Project Settings”
shows the
Altera Corporation
November 2009

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