IPR-SRAM/QDRII Altera, IPR-SRAM/QDRII Datasheet - Page 66
IPR-SRAM/QDRII
Manufacturer Part Number
IPR-SRAM/QDRII
Description
IP CORE Renewal Of IP-SRAM/QDRII
Manufacturer
Altera
Type
MegaCorer
Specifications of IPR-SRAM/QDRII
Software Application
IP CORE, Memory Controllers, SDRAM
Supported Families
HardCopy II, Stratix
Features
Automatic Concatenation Of Consecutive Reads And Writes, Easy-to-Use IP Toolbench Interface
Core Architecture
FPGA
Core Sub-architecture
HardCopy, Stratix
Rohs Compliant
NA
Function
QDRII SRAM Controller
License
Renewal License
Lead Free Status / RoHS Status
na
Lead Free Status / RoHS Status
na
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MegaCore Verification
MegaCore
Verification
3–34
QDRII SRAM Controller MegaCore Function User Guide
Stratix II Memory Demonstration Board 2 EP2S60F1020C3
Table 3–18. Altera Development Boards
Development Board
MegaCore verification involves simulation testing and hardware testing.
Simulation Environment
Altera has carried out extensive tests using industry-standard models to
ensure the functionality of the QDRII SRAM controller. In addition,
Altera has carried out a wide variety of gate-level tests of the QDRII
SRAM controller to verify the post-compilation functionality of the
controller.
Hardware Testing
Table 3–18
hardware tested the QDRII SRAM controller.
shows the Altera development board on which Altera
MegaCore Version 9.1
Altera Device
Samsung 18-bit QDRII SDRAM
Memory Device
Altera Corporation
November 2009
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