IPR-SRAM/QDRII Altera, IPR-SRAM/QDRII Datasheet - Page 49

• Manufacturer Part Number: IPR-SRAM/QDRII
• Description: IP CORE Renewal Of IP-SRAM/QDRII
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-SRAM/QDRII

• Software Application: IP CORE, Memory Controllers, SDRAM
• Supported Families: HardCopy II, Stratix
• Features: Automatic Concatenation Of Consecutive Reads And Writes, Easy-to-Use IP Toolbench Interface
• Core Architecture: FPGA
• Core Sub-architecture: HardCopy, Stratix
• Rohs Compliant: NA
• Function: QDRII SRAM Controller
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Figure 3–14. Isolated Read—Burst of Four (Wide Mode)
Altera Corporation
November 2009
avl_wait_request_rd
avl_data_read_valid
avl_data_rd[19:0]
avl_data_rd[17:0]
qdrii_a[19:0]
qdrii_q[17:0]
qdrii_rpsn
qdrii_cqn
avl_read
qdrii_cq
avl_clk
qdrii_k
0001
0001
Figure 3–14
(wide mode). The read occurs on the Avalon interface, the slave issues a
latent read answer. The read command is sent to the memory with the
address.
Burst
Bursts only apply to burst of four, (narrow mode), refer to
page
data required on the QDRII SRAM interface is available for a single
Avalon read. The burst consists of two consecutive read requests. The
controller sends one read request to the memory, which returns the four
half cycles of value. After resynchronization, the data is sent back to the
Avalon interface.
3–18. For the other two modes, there is no such concept as all the
shows the behavior of a single read request for a burst of four
MegaCore Version 9.1
QDRII SRAM Controller MegaCore Function User Guide
0001
0001
01 02 03 04
04
Functional Description
Figure 3–15 on
01020304
01020304
3–17