PAC-POWR607-EV Lattice, PAC-POWR607-EV Datasheet - Page 25

• Manufacturer Part Number: PAC-POWR607-EV
• Description: MCU, MPU & DSP Development Tools ispPAC POWR607 EVAL BRD
• Manufacturer: Lattice
• Series: ispPAC®r

Specifications of PAC-POWR607-EV

• Processor To Be Evaluated: ispPAC-POWR607
• Interface Type: JTAG
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3.96 V
• Core Architecture: CPLD
• Main Purpose: Power Management, Power Supply Supervisor/Tracker/Sequencer
• Embedded: Yes, Other
• Utilized Ic / Part: ispPAC-POWR607
• Primary Attributes: -
• Secondary Attributes: 4.5 ~ 9 V Supply
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Package Diagrams
32-Pin QFNS
Dimensions in millimeters
PIN 1 ID AREA
2.
1.
NOTES: UNLESS OTHERWISE SPECIFIED
4
5
3
SEATING
PLANE
3
C
ALL DIMENSIONS ARE IN MILLIMETERS.
DIMENSIONS AND TOLERANCES
PER ANSI Y14.5M.
EXACT SHAPE AND SIZE OF THIS
FEATURE IS OPTIONAL.
DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.30 mm FROM TERMINAL TIP.
APPLIES TO EXPOSED PORTION OF TERMINALS.
A
1
N
SIDE VIEW
D
TOP VIEW
VIEW A
2X
0.15
C
E
B
A
2X
0.15
4-25
C
B
0.50 TYP
32X
VIEW A
L
SYMBOL
A3
4X
A
A1
A3
D
D2
E
E2
b
e
L
e
ispPAC-POWR607 Data Sheet
A1
BOTTOM VIEW
D2
MIN.
0.80
0.00
1.25
1.25
0.18
0.30
A
0.50 BSC
N
0.2 REF
5.0 BSC
5.0 BSC
b
0.08
NOM.
0.90
0.02
2.70
2.70
0.24
0.40
LOCATED IN THIS AREA
PIN #1 ID FIDUCIAL
1
0.10
C
M
5
E2
C
MAX.
1.00
0.05
3.75
3.75
0.30
0.50
A
B
4
3