PAC-POWR607-EV Lattice, PAC-POWR607-EV Datasheet - Page 7

• Manufacturer Part Number: PAC-POWR607-EV
• Description: MCU, MPU & DSP Development Tools ispPAC POWR607 EVAL BRD
• Manufacturer: Lattice
• Series: ispPAC®r

Specifications of PAC-POWR607-EV

• Processor To Be Evaluated: ispPAC-POWR607
• Interface Type: JTAG
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3.96 V
• Core Architecture: CPLD
• Main Purpose: Power Management, Power Supply Supervisor/Tracker/Sequencer
• Embedded: Yes, Other
• Utilized Ic / Part: ispPAC-POWR607
• Primary Attributes: -
• Secondary Attributes: 4.5 ~ 9 V Supply
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
AC/Transient Characteristics
Figure 4-3. Power-Down Mode Timing
Voltage Monitors
t
t
Oscillators
f
Timers
Timeout Range
Resolution
Accuracy
Power-Down Mode
T
T
T
T
PD12
PD48
PLDCLK
PWRDN
PWRDN_HOLD
PWRUP
PWRDN_UP
Symbol
Propagation delay input to output
glitch filter OFF
Propagation delay input to output
glitch filter ON
PLDCLK frequency
Range of programmable timers
(128 steps)
Spacing between available
adjacent timer intervals
Timer accuracy
Time to enter power-down mode
Minimum required time in power-
down mode before power-up can
occur
Time to exit power-down mode
Total time to enter and then exit
power-down mode
VCC
IN1_PWRDN
(low = power-down)
ICC
I
CC
Parameter
(nominal)
Over Recommended Operating Conditions
I
T
CC_PWRDN
PWRDN
T
Device previously on
PWRDN_HOLD
4-7
Conditions
T
PWRDN_UP
ispPAC-POWR607 Data Sheet
0.032
-6.67
Min.
240
100
100
300
500
T
PWRUP
Typ.
250
12
48
-12.5
Max.
1966
260
13
Units
kHz
ms
µs
µs
µs
µs
µs
µs
%
%