PAC-POWR607-EV Lattice, PAC-POWR607-EV Datasheet - Page 5

• Manufacturer Part Number: PAC-POWR607-EV
• Description: MCU, MPU & DSP Development Tools ispPAC POWR607 EVAL BRD
• Manufacturer: Lattice
• Series: ispPAC®r

Specifications of PAC-POWR607-EV

• Processor To Be Evaluated: ispPAC-POWR607
• Interface Type: JTAG
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3.96 V
• Core Architecture: CPLD
• Main Purpose: Power Management, Power Supply Supervisor/Tracker/Sequencer
• Embedded: Yes, Other
• Utilized Ic / Part: ispPAC-POWR607
• Primary Attributes: -
• Secondary Attributes: 4.5 ~ 9 V Supply
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Voltage Monitors
High Voltage FET Drivers
Power-On Reset (Internal)
T
T
T
T
V
V
V
1. Corresponds to VCC supply voltage.
V
I
I
R
C
V
V
V
HYST
1. Guaranteed by characterization across V
OUTSRC
OUTSINK
RST
START
BRO
POR
PP
Symbol
TL
TH
T
MON
Z
MON
IN
IN
Symbol
Sense
Symbol
Range
Accuracy
Delay from V
Duration of start-up state
Minimum duration brown out required to
enter reset state
Delay from brown out to reset state
Threshold below which POR is LOW
Threshold above which POR is HIGH
Threshold above which POR is valid
Gate driver output voltage
Gate driver source current
(HIGH state)
Gate driver sink current
(LOW state)
Input resistance
Input capacitance
Programmable trip-point range
Near-ground sense threshold
Absolute accuracy of any trip-point
Hysteresis of any trip-point (relative to
setting)
TH
Parameter
to start-up state
Parameter
Parameter
CC
range, operating temperature, process.
1
1
1
Controlled ramp setting
FET turn off mode
1
Conditions
Conditions
Conditions
4-5
0.075
Min.
Min.
Min.
8.1
1.0
2.5
0.8
55
70
1
ispPAC-POWR607 Data Sheet
Typ.
±0.5
Typ.
Typ.
2.5
65
75
15
8
1
9
5.811
Max.
Max.
Max.
100
300
1.5
9.9
75
80
2.2
5
7
Units
Units
Units
mV
mA
k Ω
pF
µA
%
µs
µs
µs
µs
%
V
V
V
V
V