PAC-POWR607-EV Lattice, PAC-POWR607-EV Datasheet - Page 27

MCU, MPU & DSP Development Tools ispPAC POWR607 EVAL BRD

PAC-POWR607-EV

Manufacturer Part Number
PAC-POWR607-EV
Description
MCU, MPU & DSP Development Tools ispPAC POWR607 EVAL BRD
Manufacturer
Lattice
Series
ispPAC®r
Datasheets

Specifications of PAC-POWR607-EV

Processor To Be Evaluated
ispPAC-POWR607
Interface Type
JTAG
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3.96 V
Core Architecture
CPLD
Main Purpose
Power Management, Power Supply Supervisor/Tracker/Sequencer
Embedded
Yes, Other
Utilized Ic / Part
ispPAC-POWR607
Primary Attributes
-
Secondary Attributes
4.5 ~ 9 V Supply
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lattice Semiconductor
Part Number Description
ispPAC-POWR607 Ordering Information
Conventional Packaging
Lead-Free Packaging
1. Contact factory for package availability.
2. Use 32-pin QFNS package for all new designs. Refer to PCN #13A-08 for 32-pin QFN package discontinuance.
Device Family
Device Number
ispPAC-POWR607-01S32I
ispPAC-POWR607-01N32I
1. Use QFNS package. QFN package devices have been discontinued via PCN #13A-08.
ispPAC-POWR607-01SN32I
ispPAC-POWR607-01NN32I
1. Use QFNS package. QFN package devices have been discontinued via PCN #13A-08.
ispPAC-POWR607 - 01XX32X
Part Number
Part Number
1
1
Industrial
Industrial
4-27
Lead-Free QFNS
Lead-Free QFN
Package
Package
QFNS
QFN
Package
Performance Grade
Operating Temperature Range
ispPAC-POWR607 Data Sheet
S32 = 32-pin QFNS
SN32 = Lead-Free 32-pin QFNS
N32 = 32-pin QFN
NN32 = Lead-Free 32-pin QFN
01 = Standard
I = Industrial (-40
Pins
Pins
32
32
32
32
o
C to +85
2
1
o
C)
2

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