5M2210ZF256C5N Altera, 5M2210ZF256C5N Datasheet - Page 17

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5M2210ZF256C5N

Manufacturer Part Number
5M2210ZF256C5N
Description
ALTERA
Manufacturer
Altera
Series
MAX Vr

Specifications of 5M2210ZF256C5N

Cpld Type
FLASH
No. Of Macrocells
1700
No. Of I/o's
271
Propagation Delay
7.5ns
Global Clock Setup Time
4.6ns
Frequency
201.1MHz
Supply Voltage Range
1.71V To 1.89V
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
7.0ns
Voltage Supply - Internal
1.71 V ~ 1.89 V
Number Of Logic Elements/blocks
2210
Number Of Macrocells
1700
Number Of Gates
-
Number Of I /o
203
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
256-LBGA
Rohs Compliant
Yes
Lead Free Status / Rohs Status
Vendor undefined / RoHS Compliant

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0
1
2
1
2
3
FineLine ball grid array.
Hybrid package (flip chip) FBGA: 42.5 x 42.5 (mm) 1.0-mm pitch.
I/O counts do not include dedicated clock inputs that can be used as data inputs.
Hybrid package (flip chip) FBGA: 35 x 35 (mm) 1.0-mm pitch.
Hybrid package (flip chip) FBGA: 42.5 x 42.5 (mm) 1.0-mm pitch.
12+12+12
EP4S40G2
EP4S40G5
EP4S100G2
EP4S100G3
EP4S100G4
EP4S100G5
EP4SGX70
EP4SGX110
EP4SGX180
EP4SGX230
EP4SGX290
EP4SGX360
EP4SGX530
636
636
8+0
Values on top indicate available user I/O pins; values at the bottom indicate the 8.5-Gbps plus 6.5-Gbps transceiver count.
Vertical migration (same V cc , GND, ISP, and input pins). For vertical migration, the number of user I/Os may be less than the number stated in the table.
Stratix series devices are offered in commercial and industrial temperatures and RoHS-compliant packages.
Stratix IV GT devices are only offered in industrial temperatures (0˚C to 100˚C).
Values on top indicate available user I/O pins; values on bottom indicate the 11.3-Gbps plus 8.5-Gbps plus 6.5-Gbps transceiver count.
Vertical migration (same V cc , GND, ISP, and input pins). For vertical migration, the number of user I/Os may be less than the number stated in the table.
Stratix series devices are offered in commercial and industrial temperatures and RoHS-compliant packages.
Stratix IV GT devices are only offered in industrial temperatures (0˚C to 100˚C).
29 x 29 (mm)
1.0-mm pitch
40 x 40 (mm)
1.0-mm pitch
780 pin
1,517 pin
12+12+12
12+12+12
24+0+12
24+0+12
288
16+0
288
16+0
Stratix IV GT FPGAs (0.95 V),
368
368
368
368
8+0
8+0
8+0
8+0
646
646
646
646
11.3-Gbps Transceivers
2
2
2
2
FBGA (F)
35 x 35 (mm)
1,152 pin
1.0-mm pitch
1
16+0
16+0
16+0
16+0
16+0
368
560
560
560
560
1,932 pin
45 x 45 (mm)
1.0-mm pitch
24+8+16
24+8+16
32+0+16
769
769
769
Stratix IV GX FPGAs (0.9 V), 8.5-Gbps Transceivers
1,152 pin
35 x 35 (mm)
1.0-mm pitch
16+8
16+8
16+8
16+8
16+8
16+8
560
16+8
480
480
560
560
560
560
3
FBGA (F)
Stratix Series Package and I/O Matrices
1,517 pin
40 x 40 (mm)
1.0-mm pitch
24+12
24+12
24+12
24+12
24+12
736
736
736
736
736
Altera Product Catalog
3
42.5 x 42.5 (mm)
1
1.0-mm pitch
1,760 pin
24+12
24+12
24+12
864
864
864
2011
www.altera.com
1.0-mm pitch
1,932 pin
45 x 45 (mm)
32+16
32+16
32+16
904
904
904
Devices
15

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