5M2210ZF256C5N Altera, 5M2210ZF256C5N Datasheet - Page 5

• Manufacturer Part Number: 5M2210ZF256C5N
• Description: ALTERA
• Manufacturer: Altera
• Series: MAX Vr

Specifications of 5M2210ZF256C5N

• Cpld Type: FLASH
• No. Of Macrocells: 1700
• No. Of I/o's: 271
• Propagation Delay: 7.5ns
• Global Clock Setup Time: 4.6ns
• Frequency: 201.1MHz
• Supply Voltage Range: 1.71V To 1.89V
• Programmable Type: In System Programmable
• Delay Time Tpd(1) Max: 7.0ns
• Voltage Supply - Internal: 1.71 V ~ 1.89 V
• Number Of Logic Elements/blocks: 2210
• Number Of Macrocells: 1700
• Number Of Gates: -
• Number Of I /o: 203
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 256-LBGA
• Rohs Compliant: Yes
• Lead Free Status / Rohs Status: Vendor undefined / RoHS Compliant

The following features, packages, and I/O matrices give you an overview of our devices. To get the full story, check out our
online selector guide: www.altera.com/selector.
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2
www.altera.com/selector
See supported protocols and data rates on page 69
All data is preliminary.
3.3-V compliant, requires a 3-V power supply.
ALMs
Equivalent LEs
Registers
M20K memory blocks
M20K memory (Mb)
MLAB memory (Mb)
18-bit x 18-bit multipliers
27-bit x 27-bit DSP blocks
Speed grades: FPGA fabric
(fastest to slowest)
Speed grades: transceiver
(fastest to slowest)
Global clock networks
Regional clock networks
Design security
HardCopy series device support
I/O voltage levels supported (V)
I/O standards supported
LVDS channels, 1.4 Gbps (receive/transmit)
Embedded DPA circuitry
Series, parallel, and differential OCT
Transceiver (SERDES) channels
(28G/12.5 Gbps)
PCIe hard IP blocks
100-Gbps Ethernet (100GbE) hard IP blocks
Memory devices supported
2
LVTTL, LVCMOS, PCI™, PCI-X™, LVDS, mini-LVDS, RSDS, LVPECL, Differential SSTL-15,
Differential SSTL-18, Differential SSTL-2, Differential HSTL-12, Differential HSTL-5,
Differential HSTL-18, SSTL-15 (I and II), SSTL-18 (I and II), SSTL-2 (I and II),
1.2-V HSTL (I and II), 1.5-V HSTL (I and II), 1.8-V HSTL (I and II)
Stratix V GT FPGAs (0.85 V), Up to 28G Transceivers
5SGTC5
160,500
425,000
642,000
2,304
4.89
4/32
512
256
150
Yes
45
1
DDR3, DDR2, DDR, QDR II, RLDRAM II, SDR
1.2, 1.5, 1.8, 2.5, 3.3
Altera Product Catalog
Contact Altera
-2, -3, -4
-1, -2, -3
16
92
3
3
3
Stratix V GT FPGA Features
2
•
2011
5SGTC7
234,750
622,000
939,000
2,560
4/32
7.16
•
512
256
150
Yes
50
1
www.altera.com
1
Devices
3