AD9516-5BCPZ-REEL7 Analog Devices Inc, AD9516-5BCPZ-REEL7 Datasheet - Page 47

• Manufacturer Part Number: AD9516-5BCPZ-REEL7
• Description: 10/14 Chan Clock IC W/PLL-no VCO
• Manufacturer: Analog Devices Inc
• Type: Clock Generator, Fanout Distributionr

Specifications of AD9516-5BCPZ-REEL7

• Pll: Yes
• Input: CMOS, LVDS, LVPECL
• Output: CMOS, LVDS, LVPECL
• Number Of Circuits: 1
• Ratio - Input:output: 1:14
• Differential - Input:output: Yes/Yes
• Frequency - Max: 2.4GHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LFCSP
• Frequency-max: 2.4GHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 44. Serial Control Port, 16-Bit Instruction Word, MSB First
MSB
I15
R/W
SCLK
SCLK
SCLK
SDIO
SDIO
SDIO
SDO
CS
CS
CS
DON'T CARE
DON'T CARE
DON'T CARE
DON'T CARE
DON'T CARE
SCLK
SDIO
CS
DON'T CARE
R/W
I14
W1
DON'T CARE
DON'T CARE
W1
R/W
A0 A1 A2 A3
W0
16-BIT INSTRUCTION HEADER
W1
A12
I13
W0
A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
W0
A12
t
S
R/W
I12
A12 = 0
A11 A10 A9 A8 A7
A4
16-BIT INSTRUCTION HEADER
16-BIT INSTRUCTION HEADER
t
A5 A6 A7 A8
DS
Figure 53. Serial Control Port Write—MSB First, 16-Bit Instruction, Timing Measurements
W1
Figure 51. Serial Control Port Write—MSB First, 16-Bit Instruction, Two Bytes of Data
Figure 52. Serial Control Port Read—MSB First, 16-Bit Instruction, Four Bytes of Data
Figure 55. Serial Control Port Write—LSB First, 16-Bit Instruction, Two Bytes of Data
SCLK
SDIO
SDO
I11
A11 = 0
W0
t
CS
DH
Figure 54. Timing Diagram for Serial Control Port Register Read
A12
A6 A5
A9 A10 A11 A12
t
LOW
t
A11
HIGH
I10
A10 = 0
D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
A4 A3 A2
REGISTER (N) DATA
DATA BIT N
A10
W0
t
DV
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A9
I9
A9
W1
A1 A0
t
CLK
R/W
A8
I8
A8
D7 D6 D5 D4 D3
D0
DATA BIT N – 1
REGISTER (N – 1) DATA
A7
D1
REGISTER (N) DATA
REGISTER (N) DATA
I7
A7
D2 D3 D4
A6
I6
A6
A5
D2 D1 D0 D7
D5 D6 D7
I5
A5
D4
REGISTER (N – 2) DATA
D3
I4
A4
D0
D2
D6 D5
REGISTER (N – 1) DATA
D1 D2
REGISTER (N + 1) DATA
I3
A3
D1
I2
A2
D4 D3 D2
D3 D4 D5
D0
REGISTER (N – 3) DATA
t
I1
A1
C
D1 D0
D6
DON'T CARE
DON'T CARE
LSB
I0
A0
D7
AD9516-5
DON'T CARE
DON'T CARE
DON'T CARE
DON'T CARE
DON'T CARE
DON'T
CARE