AD9516-5BCPZ-REEL7 Analog Devices Inc, AD9516-5BCPZ-REEL7 Datasheet - Page 59

• Manufacturer Part Number: AD9516-5BCPZ-REEL7
• Description: 10/14 Chan Clock IC W/PLL-no VCO
• Manufacturer: Analog Devices Inc
• Type: Clock Generator, Fanout Distributionr

Specifications of AD9516-5BCPZ-REEL7

• Pll: Yes
• Input: CMOS, LVDS, LVPECL
• Output: CMOS, LVDS, LVPECL
• Number Of Circuits: 1
• Ratio - Input:output: 1:14
• Differential - Input:output: Yes/Yes
• Frequency - Max: 2.4GHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LFCSP
• Frequency-max: 2.4GHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Reg.
Addr
(Hex) Bit(s) Name
01B
01B
01B
01B
[7]
[6]
[5]
[4:0] REFMON pin
CLK
frequency
monitor
REF2 (REFIN)
frequency
monitor
REF1 (REFIN)
frequency
monitor
control
[5]
1
1
Enable or disable CLK frequency monitor.
[7] = 0; disable CLK frequency monitor (default).
[7] = 1; enable CLK frequency monitor.
Enable or disable REF2 frequency monitor.
[6] = 0; disable REF2 frequency monitor (default).
[6] = 1; enable REF2 frequency monitor.
REF1 (REFIN) frequency monitor enable; this is for both REF1 (single-ended) and REFIN (differential) inputs
(as selected by differential reference mode).
[5] = 0; disable REF1 (REFIN) frequency monitor (default).
[5] = 1; enable REF1 (REFIN) frequency monitor.
Selects the REFMON pin signal.
[4]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
Description
[4]
1
1
[3]
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
[3]
1
1
[2]
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
[2]
1
1
[1]
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
[0]
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
[1]
1
1
Level or
Dynamic
Signal
LVL
DYN
DYN
DYN
DYN
LVL
LVL
LVL
LVL
LVL
LVL
LVL
LVL
LVL
LVL
LVL
LVL
DYN
DYN
DYN
DYN
LVL
LVL
LVL
LVL
[0]
0
1
Rev. 0 | Page 59 of 76
Level or
Dynamic
Signal
LVL
LVL
Signal at REFMON Pin
Ground (dc) (default).
REF1 clock (differential reference when in differential mode).
REF2 clock (N/A in differential mode).
Selected reference to PLL (differential reference when in differential
mode).
Unselected reference to PLL (not available in differential mode).
Status of selected reference (status of differential reference);
active high.
Status of unselected reference (not available in differential mode);
active high.
Status REF1 frequency (active high).
Status REF2 frequency (active high).
(Status REF1 frequency) AND (status REF2 frequency).
(DLD) AND (status of selected reference) AND (status of CLK).
Status of CLK frequency (active high).
Selected reference (low = REF1, high = REF2).
Digital lock detect (DLD); active low.
Holdover active (active high).
LD pin comparator output (active high).
VS (PLL supply).
REF1 clock (differential reference when in differential mode).
REF2 clock (not available in differential mode).
Selected reference to PLL (differential reference when in differential
mode).
Unselected reference to PLL (not available when in differential mode).
Status of selected reference (status of differential reference);
active low.
Status of unselected reference (not available in differential mode);
active low.
Status of REF1 frequency (active low).
Status of REF2 frequency (active low).
Signal at LD Pin
Holdover active (active low).
N/A—do not use.
AD9516-5