ADSP-BF531SBBC400 Analog Devices Inc, ADSP-BF531SBBC400 Datasheet - Page 17
![IC,MICROPROCESSOR,32-BIT,CMOS,BGA,160PIN,PLASTIC](/photos/6/71/67133/bc-160-2_sml.jpg)
ADSP-BF531SBBC400
Manufacturer Part Number
ADSP-BF531SBBC400
Description
IC,MICROPROCESSOR,32-BIT,CMOS,BGA,160PIN,PLASTIC
Manufacturer
Analog Devices Inc
Series
Blackfin®r
Type
Fixed Pointr
Datasheet
1.ADSP-BF531SBSTZ400.pdf
(12 pages)
Specifications of ADSP-BF531SBBC400
Rohs Status
RoHS non-compliant
Interface
SPI, SSP, UART
Clock Rate
400MHz
Non-volatile Memory
ROM (1 kB)
On-chip Ram
52kB
Voltage - I/o
1.8V, 2.5V, 3.3V
Voltage - Core
1.20V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
160-CSPBGA
Device Core Size
16b
Architecture
Modified Harvard
Format
Fixed Point
Clock Freq (max)
400MHz
Mips
400
Device Input Clock Speed
400MHz
Operating Supply Voltage (typ)
1.2/1.8/2.5/3.3V
Operating Supply Voltage (min)
0.8/1.75V
Operating Supply Voltage (max)
1.32/3.6V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
160
Package Type
CSPBGA
Package
160CSP-BGA
Numeric And Arithmetic Format
Fixed-Point
Maximum Speed
400 MHz
Device Million Instructions Per Second
400 MIPS
For Use With
ADZS-BF533-EZLITE - KIT W/BOARD EVAL FOR ADSP-BF533
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ADSP-BF531SBBC400
Manufacturer:
ADI
Quantity:
329
Company:
Part Number:
ADSP-BF531SBBC400
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Part Number:
ADSP-BF531SBBC400
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Silicon Anomaly List
30.
31.
DESCRIPTION:
In asynchronous communications, transmitter and receiver bit clocks can differ to a certain percentage of the nominal value. The exact
amount is dependent upon the configuration of the word to be transmitted and other external factors such as signal quality.
For the Blackfin UART receiver, the tolerance is different when its bit-clock is slower or faster than the sender's clock. The Blackfin UART
receiver will tolerate differences well when the transmitting side (sender) is operating at slightly lower bit rates. If, however, the sender is
operating at slightly higher bit rates than the Blackfin receiver, the communication may fail for back-to-back transfers (i.e. no gaps
between the words).
The reason for this is that the receiver, as per the standard implementation, samples the stop-bit, like any other bit, 16 times before it is
ready to detect a new start bit condition. Since the decision of whether a stop-bit has been detected is done after the 9th sample, the
receiver should immediately be ready for the next word if a stop-bit is detected. Instead, the Blackfin receiver will take the remaining 7
samples as well.
The effect of this is that the sampling error may accumulate for the kind of data transfers described above.
The anomaly has no effect on single transfers or transfers with gaps between the words, as the sampling error will not accumulate.
WORKAROUND:
The sender should operate at a lower (or identical) bit-rate.
If this cannot be guaranteed (and if possible), configure the sender to transmit more than one stop-bit, thus inserting the necessary gaps
between words.
If both the sender and the receiver are Blackfin devices in a bidirectional communication channel, the above workarounds will not resolve
this issue. This is due to anomalies 05000225 and 05000231.
APPLIES TO REVISION(S):
0.3, 0.4
DESCRIPTION:
The STB bit controls how many stop-bits are generated by the transmitter.
However, this setting also incorrectly affects how many stop-bits are sampled by the receiver. The correct behavior is for the receiver to
always sample and test one stop-bit. However, the receiver will sample and test the number of stop-bits set by the STB bit. This incorrect
behavior also affects framing error detection.
Note that this anomaly makes the workaround for anomaly 05000230 not applicable to the case of a bidirectional link composed of two
Blackfin devices.
WORKAROUND:
None
APPLIES TO REVISION(S):
0.3, 0.4
05000230 - UART Receiver is Less Robust Against Baudrate Differences in Certain Conditions:
05000231 - UART STB Bit Incorrectly Affects Receiver Setting:
NR003532D | Page 17 of 45 | July 2008
ADSP-BF531/BF532/BF533