CP3BT10G38 National Semiconductor, CP3BT10G38 Datasheet - Page 101
CP3BT10G38
Manufacturer Part Number
CP3BT10G38
Description
IC CPU RISC W/LLC&USB 100-LQFP
Manufacturer
National Semiconductor
Datasheet
1.CP3BT10G38.pdf
(210 pages)
Specifications of CP3BT10G38
Applications
Connectivity Processor
Core Processor
CR16C
Program Memory Type
FLASH (256 kB)
Controller Series
CP3000
Ram Size
10K x 8
Interface
Bluetooth, ACCESS.bus, Audio, UART, USB, Microwire/SPI
Number Of I /o
37
Voltage - Supply
2.25 V ~ 2.75 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
*CP3BT10G38
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17.6.4
The AAI can operate in a special IOM-2 compatible mode to
allow to connect to an external ISDN controller device. In
this IOM-2 mode, the AAI can only operate as a slave, i.e.
the bit clock and frame sync signal is provided by the ISDN
controller. The AAI only supports the B1 and B2 data of the
IOM-2 channel 0, but ignores the other two IOM-2 channels.
The AAI handles the B1 and B2 data as one 16-bit data
word.
Figure 39 shows the connections between an ISDN control-
ler and a CP3BT10 using a standard IOM-2 interface for the
B1/B2 data communication and the external bus interface
(IO Expansion) for controlling the ISDN controller.
Figure 39. CP3BT10/ISDN Controller Connections
CP3BT10
IOM-2 Mode
SELIO
A[7:0]
D[7:0]
SRD
SCK
SFS
STD
RD
STD/SRD
SFS
B1
IOM-2 Channel 0
Bit Clock
Frame Sync
Data In
Data Out
Address
Data
Chip Select
Output Enable
B2
Figure 38. IOM-2 Frame Structure
ISDN Controller
M
C
DS157
IC1
IOM-2 Frame (125 µs)
IOM-2 Channel 1
101
IC2
The IOM-2 interface has the following properties:
Figure 38 shows the structure of an IOM-2 Frame.
To connect the AAI to an ISDN controller through an IOM-2
compatible interface, the AAI needs to be configured in this
way:
17.6.5
In loopback mode, the STD and SRD pins are internally
connected together, so data shifted out through the ATSR
register will be shifted into the ARSR register. This mode
may be used for development, but it also allows testing the
transmit and receive path without external circuitry, for ex-
ample during Built-In-Self-Test (BIST).
M
Bit clock of 1536 kHz (output from the ISDN controller)
Frame repetition rate of 8 ksps (output from the ISDN
controller)
Double-speed bit clock (one data bit is two bit clocks
wide)
B1 and B2 data use 8-bit log PCM format
Long frame sync pulse
The AAI must be in IOM-2 Mode (AGCR.IOM2 = 1).
The AAI operates in synchronous mode (AGCR.ASS =
0).
The AAI operates as a slave, therefore the bit clock and
frame sync source selection must be set to external
(ACGR.IEFS = 1, ACGR.IEBC = 1).
The frame sync length must be set to long frame sync
(ACGR.FSS = 1).
The data word length must be set to 16-bit (AGCR.DWL
= 1).
The AAI must be set to normal mode (AGCR.SCS[1:0] =
0).
The internal frame rate must be 8 ksps (ACCR = 00BE).
C
Loopback Mode
IOM-2 Channel 2
C
DS162
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