CP3BT10G38 National Semiconductor, CP3BT10G38 Datasheet - Page 115

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CP3BT10G38

Manufacturer Part Number
CP3BT10G38
Description
IC CPU RISC W/LLC&USB 100-LQFP
Manufacturer
National Semiconductor
Datasheet

Specifications of CP3BT10G38

Applications
Connectivity Processor
Core Processor
CR16C
Program Memory Type
FLASH (256 kB)
Controller Series
CP3000
Ram Size
10K x 8
Interface
Bluetooth, ACCESS.bus, Audio, UART, USB, Microwire/SPI
Number Of I /o
37
Voltage - Supply
2.25 V ~ 2.75 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
*CP3BT10G38
of the RSFT register are copied into the URBUF register
and the Receive Buffer Full bit (URBF) is set. The URBF bit
is automatically reset when software reads the character
19.2.2
The Attention mode is available for networking this device
with other processors. This mode requires the 9-bit data for-
mat with no parity. The number of start bits and number of
stop bits are programmable. In this mode, two types of 9-bit
characters are sent on the network: address characters
consisting of 8 address bits and a 1 in the ninth bit position
and data characters consisting of 8 data bits and a 0 in the
ninth bit position.
While in Attention mode, the UART receiver monitors the
communication flow but ignores all characters until an ad-
dress character is received. On receiving an address char-
Attention Mode
16
16
1
1
Sample
2
2
Generator/Checker
Figure 42. UART Asynchronous Communication
Error Detection
3
3
Control and
STARTBIT
Parity
DATABIT
4
4
Figure 41. UART Block Diagram
5
5
6
6
7
7
Transmitter
115
Receiver
8
8
System Clock
from the URBUF register. The RSFT register is not software
accessible.
Baud Rate
acter, the contents of the receive shift register are copied to
the receive buffer. The URBF bit is set and an interrupt (if
enabled) is generated. The UATN bit is automatically
cleared, and the UART begins receiving all subsequent
characters. Software must examine the contents of the UR-
BUF register and respond by accepting the subsequent
characters (by leaving the UATN bit reset) or waiting for the
next address character (by setting the UATN bit again).
The operation of the UART transmitter is not affected by the
selection of this mode. The value of the ninth bit to be trans-
mitted is programmed by setting or clearing the UXB9 bit in
Generator
9
9
Sample
Sample
Baud Clock
Baud Clock
10
10
11
11
12
12
Flow Control
13
13
Logic
14
14
15
15
16
16
DATA (LSB)
DS163
DS061
TXD
RTS
CTS
RXD
1
1
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