CP3BT10G38 National Semiconductor, CP3BT10G38 Datasheet - Page 68
CP3BT10G38
Manufacturer Part Number
CP3BT10G38
Description
IC CPU RISC W/LLC&USB 100-LQFP
Manufacturer
National Semiconductor
Datasheet
1.CP3BT10G38.pdf
(210 pages)
Specifications of CP3BT10G38
Applications
Connectivity Processor
Core Processor
CR16C
Program Memory Type
FLASH (256 kB)
Controller Series
CP3000
Ram Size
10K x 8
Interface
Bluetooth, ACCESS.bus, Audio, UART, USB, Microwire/SPI
Number Of I /o
37
Voltage - Supply
2.25 V ~ 2.75 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
*CP3BT10G38
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15.0 Bluetooth Controller
The integrated hardware Bluetooth Lower Link Controller
(LLC) complies to the Bluetooth Specification Version 1.1
and integrates the following functions:
For a detailed description of the interface to the LMX5252,
consult the LMX5252 data sheet which is available from the
National Semiconductor wireless group. National provides
software libraries for using the Bluetooth LLC. Documenta-
tion for the software libraries is also available from National
Semiconductor.
15.1
The CP3BT10 interfaces to the LMX5251 or LMX5252 radio
chips though the RF interface.
Figure 12 shows the interface between the CP3BT10 and
the LMX5251 radio chip.
4.5K-byte dedicated Bluetooth data RAM
1K-byte dedicated Bluetooth Sequencer RAM
Support of all Bluetooth 1.1 packet types
Support for fast frequency hopping of 1600 hops/s
Access code correlation and slot timing recovery circuit
Power Management Control Logic
BlueRF-compatible interface to connect with National’s
LMX5252 and other RF transceiver chips
CP3BT10
RF INTERFACE
X1CKI/BBCLK
PI0/RFSYNC
PI1/RFCE
PI3/SCLK
PI4/SDAT
Figure 12. LMX5251 Interface
RFDATA
PI5/SLE
IOVCC
VCC
VDD_DIG_IN
TX_RX_DATA
TX_RX_SYNC
CE
CCB_CLOCK
CCB_DATA
CCB_LATCH
BBP_CLOCK
LMX5251
DS011
68
Figure 13 shows the interface between the CP3BT10 and
the LMX5252 radio chip.
The CP3BT10 implements a BlueRF-compatible interface,
which may be used with other RF transceiver chips.
15.1.1
The RF interface signals are grouped as follows:
X1CKI/BBCLK
The X1CKI/BBCLK pin is the input signal for the 12-MHz
clock signal. The radio chip uses this signal internally as the
12× oversampling clock and provides it externally to the
CP3BT10 for use as the Main Clock.
RFDATA
The RFDATA signal is the multiplexed Bluetooth data re-
ceive and transmit signal. The data is provided at a bit rate
of 1Mbit/s with 12× oversampling, synchronized to the 12
MHz BBCLK. The RFDATA signal is a dedicated RF inter-
face pin. This signal is driven to a logic high level after reset.
RFSYNC
In receive mode (data direction from the radio chip to the
CP3BT10), the RFSYNC signal acts as the frequency cor-
rection/DC compensation circuit control output to the radio
chip. The RFSYNC signal is driven low throughout the cor-
relation phase and driven high when synchronization to the
received access code is achieved.
In transmit mode (data direction from the CP3BT10 to the
radio chip), the RFSYNC signal enables the RF output of
the radio chip. When the RFSYNC pin is driven high, the RF
transmitter circuit of the radio chip is enabled, correspond-
Modem Signals (BBCLK, RFDATA, and RFSYNC)
Control Signal (RFCE)
Serial Interface Signals (SCLK, SDAT, and SLE)
Bluetooth
BTSEQ2, and BTSEQ2)
CP3BT10
RF Interface Signals
X1CKI/BBCLK
PI2/BTSEQ1
PI1/RFCE
PI3/SCLK
PI4/SDAT
Figure 13. LMX5252 Interface
RFDATA
PI5/SLE
IOVCC
Sequencer
+2.8V
Status
Signals
VCC
BBDATA_1
BXTLEN
BPKTCTL
BDCLK
BDDATA
BDEN#
BRCLK
LMX5252
(BTSEQ1,
DS317
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