CS1D-II102D Omron, CS1D-II102D Datasheet - Page 395

• Manufacturer Part Number: CS1D-II102D
• Description: CS1D Dual IO Interface Unit
• Manufacturer: Omron

Specifications of CS1D-II102D

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Instruction Execution Times and Number of Steps
9-5-2
360
AND LOAD
OR LOAD
NOT
CONDITION
ON
CONDITION
OFF
LOAD BIT
TEST
LOAD BIT
TEST NOT
AND BIT TEST
NOT
OR BIT TEST
OR BIT TEST
NOT
OUTPUT
OUTPUT NOT
KEEP
DIFFERENTI-
ATE UP
DIFFERENTI-
ATE DOWN
SET
RESET
MULTIPLE BIT
SET
MULTIPLE BIT
RESET
Instruction
Instruction
Sequence Output Instructions
AND LD
OR LD
NOT
UP
DOWN
LD TST
LDTSTN
AND TSTN
OR TST
OR TSTN
OUT
!OUT
OUT NOT
!OUT NOT
KEEP
DIFU
DIFD
SET
!SET
RSET
!RSET
SETA
RSTA
Mnemonic
Mnemonic
Note
---
---
520
521
522
350
351
351
350
351
---
---
---
---
011
013
014
---
---
---
---
530
531
Code
Code
1. When a double-length operand is used, add 1 to the value shown in the
2. Not supported by Duplex CPU Systems.
length column in the following table.
1
1
1
3
4
4
4
4
4
4
1
2
1
2
1
2
2
1
2
1
2
4
4
Length
Length
(steps)
(steps)
0.02
0.02
0.02
0.3
0.3
0.14
0.14
0.14
0.14
0.14
0.02
(See note
2.)
0.02
(See note
2.)
0.06
0.24
0.24
0.02
(See note
2.)
0.02
(See note
2.)
5.8
25.7
5.7
25.8
CPU6@H
CPU6@H
(Duplex
(Duplex
CPU)
CPU)
Execution time ( s)
Execution time ( s)
0.02
0.02
0.02
0.3
0.3
0.14
0.14
0.14
0.14
0.14
0.02
+21.37
0.02
+21.37
0.06
0.24
0.24
0.02
+21.37
0.02
+21.37
5.8
25.7
5.8
25.8
CPU6@S
CPU6@S
(Single
(Single
CPU)
CPU)
0.04
0.04
0.04
0.42
0.42
0.24
0.24
0.24
0.24
0.24
0.04
+21.37
0.04
+21.37
0.08
0.40
0.40
0.06
+21.37
0.06
+21.37
6.1
27.2
6.1
27.2
CPU4@S
CPU4@S
(Single
(Single
CPU)
CPU)
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
Word specified
---
With 1-bit set
With 1,000-bit set
With 1-bit reset
With 1,000-bit
reset
Conditions
Conditions
Section 9-5