PCA9620H/Q900/1,51 NXP Semiconductors, PCA9620H/Q900/1,51 Datasheet - Page 14

• Manufacturer Part Number: PCA9620H/Q900/1,51
• Description: LCD Drivers 480 SEGMENT LCD SEGMENT DRIVER
• Manufacturer: NXP Semiconductors

Specifications of PCA9620H/Q900/1,51

• Number Of Segments: 60
• Maximum Clock Frequency: 14500 Hz
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Power Dissipation: 400 mW
• Maximum Operating Temperature: + 105 C
• Package / Case: LQFP-80
• Maximum Supply Current: 200 uA
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935291899518

NXP Semiconductors
PCA9620
Product data sheet
7.3.1 Power-On Reset (POR)
7.3 Start-up and shut-down
The host microprocessor or microcontroller maintains the 2 line I
channel with the PCA9620. The appropriate biasing voltages for the multiplexed LCD
waveforms are generated internally. The only other connections required to complete the
system are the power supplies (V
LCD panel selected for the application.
The minimum recommended values for external capacitors on V
nominal 100 nF. When using bigger capacitors, especially on the V
ripple will be consequently smaller, however it will take longer for the internal charge pump
to first reach the target V
In the case that V
can be replaced by a single capacitor with a minimum value of 200 nF.
Remark: In the case of insufficient decoupling, ripple of V
additional V
as low-ohmic as possible. Excessive ripple on V
At power-on the PCA9620 resets to starting conditions as follows:
1. All backplane outputs are set to V
2. All segment outputs are set to V
3. Selected drive mode is: 1:8 with
4. Input and output bank selectors are reset.
5. The I
6. The data pointer is cleared (set logic 0).
7. The Internal oscillator is running; no clock signal is available on pin CLK; pin CLK is in
8. Temperature measurement is enabled.
Fig 5.
3-state.
V
DD1
V
SS
2
V
Typical system configuration when using an external V
C-bus interface is initialized.
CONTROLLER
DD1
PROCESSOR/
LCD
MICRO-
HOST
from 2.5 V to 5.5 V, V
All information provided in this document is subject to legal disclaimers.
ripple. The ripple on V
DD1
R ≤
2C
and V
t
Rev. 1 — 9 December 2010
r
b
LCD
DD2
voltage.
DD2
are connected externally, the capacitors on V
DD1
from 2.5 V to 5.5 V and V
SS
1
, V
⁄
SS
LCD
4
.
DD2,
bias.
SDA
V
SCL
.
A0
DD1
can be reduced by making the V
Universal LCD driver for low multiplex rates
A1
V
PCA9620
SS
V
DD2
, V
LCD
CLK
n.c.
LCD
may give rise to flicker on the display.
V
V
), the external capacitors, and the
V
LCD
LCD
LCD
SS
DD1
from 2.5 V to 9.0 V.
60 segment drives
8 backplanes
and V
LCD
DD1
2
C-bus communication
LCD
, V
DD2
PCA9620
, the generated
DD2
© NXP B.V. 2010. All rights reserved.
will create
, and V
LCD PANEL
SS
(up to 480
elements)
DD1
connection
013aaa248
and V
LCD
14 of 71
are
DD2