PCA9620H/Q900/1,51 NXP Semiconductors, PCA9620H/Q900/1,51 Datasheet - Page 44

• Manufacturer Part Number: PCA9620H/Q900/1,51
• Description: LCD Drivers 480 SEGMENT LCD SEGMENT DRIVER
• Manufacturer: NXP Semiconductors

Specifications of PCA9620H/Q900/1,51

• Number Of Segments: 60
• Maximum Clock Frequency: 14500 Hz
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Power Dissipation: 400 mW
• Maximum Operating Temperature: + 105 C
• Package / Case: LQFP-80
• Maximum Supply Current: 200 uA
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935291899518

NXP Semiconductors
PCA9620
Product data sheet
7.9.1.4 RAM filling in 1:6 multiplex drive mode
In order to fill the whole four RAM rows 30 bytes need to be sent to the PCA9620. After
the last byte sent, the data pointer is wrapped around to column 0 to start a possible RAM
content update (see
the data pointer, all the bits in the byte will be written correctly.
In the 1:6 multiplex drive mode the RAM is organized in six rows and 60 columns. The
eight transmitted data bits are placed in such a way, that a column is filled up (see
Figure
Fig 35. Display RAM filling order in 1:4 multiplex drive mode
Fig 36. Data pointer wrap around in 1:4 multiplex drive mode
display RAM rows/
backplane outputs
37).
(BP)
rows
All information provided in this document is subject to legal disclaimers.
display RAM
data pointer
0
1
2
3
b7
b6
b5
b4
0
Figure
Rev. 1 — 9 December 2010
b3
b2
b1
b0
1
display RAM columns/segment outputs (S)
2
36). Even if a data byte is transmitted during the wrapping of
0
1
2
3
3
b3
b2
b1
b0
0
4
1
5
display RAM columns/segment outputs (S)
2
6
columns
3
7
4
Universal LCD driver for low multiplex rates
5
wrap around
6
columns
55 56 57 58 59
7
55 56 57 58 59
MSB
b7
013aaa289
b6
transmitted data byte
b7
b6
b5
b4
PCA9620
b5
© NXP B.V. 2010. All rights reserved.
b4
b3
b2
013aaa265
b1
44 of 71
LSB
b0