PCA9620H/Q900/1,51 NXP Semiconductors, PCA9620H/Q900/1,51 Datasheet - Page 47

LCD Drivers 480 SEGMENT LCD SEGMENT DRIVER

PCA9620H/Q900/1,51

Manufacturer Part Number
PCA9620H/Q900/1,51
Description
LCD Drivers 480 SEGMENT LCD SEGMENT DRIVER
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PCA9620H/Q900/1,51

Number Of Segments
60
Maximum Clock Frequency
14500 Hz
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Power Dissipation
400 mW
Maximum Operating Temperature
+ 105 C
Package / Case
LQFP-80
Maximum Supply Current
200 uA
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935291899518

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PCA9620H/Q900/1,51
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
PCA9620
Product data sheet
7.9.2.1 Input-bank-select
In
read from the first four rows of the memory (bank 0), while the transmitted data is stored in
the second four rows of the memory (bank 4) which is currently not accessed for the
reading. Therefore different content can be loaded into the first and second four RAM
rows which will be immediately displayed on the LCD by switching it with the
output-bank-select command (see
The input-bank-select command (see
display RAM in accordance with the selected LCD drive configuration.
The input-bank-select command works independently to the output-bank-select.
Fig 41. Example of bank selection in 1:4 multiplex mode
Fig 42. Example of the input-bank-select and the output-bank-select command with
INPUT-BANK-SELECT COMMAND
CONTROLS THE INPUT DATA PATH
Figure 41
In static drive mode, an individual content can be stored in each RAM bank (bank 0 to
bank 7 which corresponds to row 0 to row 7).
In 1:2 multiplex drive mode, individual content for RAM bank 0 (row 0 and row 1),
RAM bank 2 (row 2 and row 3), RAM bank 4 (row 4 and 5) and RAM bank 6 (row 6
and row 7) can be stored.
In 1:4 multiplex drive mode individual content can be stored in RAM bank 0 (row 0 to
row 3) and RAM bank 4 (row 4 to row 7).
display RAM rows/
backplane outputs
MICROCONTROLLER
multiplex drive mode 1:4
(BP)
rows
an example is shown for 1:4 multiplex drive mode where the displayed data is
All information provided in this document is subject to legal disclaimers.
0
1
2
3
4
5
6
7
Rev. 1 — 9 December 2010
0
1
2
display RAM columns/segment outputs (S)
3
4
Figure
5
Table 18 on page
6
columns
42).
7
BANK 0
Universal LCD driver for low multiplex rates
BANK 4
RAM
55 56 57 58 59
10) loads display data into the
OUTPUT-BANK-SELECT COMMAND
CONTROLS THE OUTPUT DATA PATH
output RAM bank
input RAM bank
PCA9620
DISPLAY
© NXP B.V. 2010. All rights reserved.
to the LCD
to the RAM
013aaa422
013aaa424
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