PCA9620H/Q900/1,51 NXP Semiconductors, PCA9620H/Q900/1,51 Datasheet - Page 5

LCD Drivers 480 SEGMENT LCD SEGMENT DRIVER

PCA9620H/Q900/1,51

Manufacturer Part Number
PCA9620H/Q900/1,51
Description
LCD Drivers 480 SEGMENT LCD SEGMENT DRIVER
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PCA9620H/Q900/1,51

Number Of Segments
60
Maximum Clock Frequency
14500 Hz
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Power Dissipation
400 mW
Maximum Operating Temperature
+ 105 C
Package / Case
LQFP-80
Maximum Supply Current
200 uA
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935291899518

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PCA9620H/Q900/1,51
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
7. Functional description
PCA9620
Product data sheet
7.1.1 Command: initialize
7.1 Commands of PCA9620
The PCA9620 is a versatile peripheral device designed to interface any microprocessor or
microcontroller to a wide variety of LCDs. It can directly drive any static or multiplexed
LCD containing up to 480 elements.
The PCA9620 is controlled by 22 commands, which are defined in
combinations of operation code bits that are not mentioned in this document may lead to
undesired operation modes of PCA9620.
Table 4.
This command generates a chip wide reset which resets all command values to their
default values (see
After this command is sent, it is possible to send additional commands without the need to
re-initialize the interface. Reset takes 100 ns to complete.
For further information see
Command name
initialize
OTP-refresh
oscillator-ctrl
charge-pump-ctrl
temp-msr-ctrl
temp-comp-SLA
temp-comp-SLB
temp-comp-SLC
temp-comp-SLD
set-VPR-MSB
set-VPR-LSB
display-enable
set-MUX-mode
set-bias-mode
load-data-pointer
frame-frequency
input-bank-select
output-bank-select
write-RAM-data
temp-read
invmode_CPF_ctrl
temp-filter
Commands of PCA9620
All information provided in this document is subject to legal disclaimers.
Bits
7
0
1
1
1
1
0
0
0
0
0
0
0
0
1
1
0
0
0
B[7:0]
TD[7:0]
1
1
Table 25 on page
Rev. 1 — 9 December 2010
6
0
1
1
1
1
0
0
0
0
1
1
0
0
1
0
1
0
0
1
1
Section 7.3 on page
5
1
0
0
0
0
0
1
1
1
0
0
1
0
0
P[5:0]
1
0
0
0
0
15). It must be sent to the PCA9620 after power-on.
4
1
1
0
0
0
1
0
0
1
0
1
1
0
0
F[4:0]
0
1
1
1
Universal LCD driver for low multiplex rates
3
1
0
1
0
1
1
0
1
0
VPR[7:4]
VPR[3:0]
1
0
0
1
0
0
0
14.
2
0
0
1
0
0
SLA[2:0]
SLB[2:0]
SLC[2:0]
SLD[2:0]
0
M[2:0]
1
IB[2:0]
OB[2:0]
1
0
1
1
0
COE
CPE
TCE
0
B[1:0]
LF
1
Table
0
0
0
OSC
CPC
TME
E
CPF
TFE
PCA9620
© NXP B.V. 2010. All rights reserved.
4. Any other
Reference
Section 7.1.1
Section 7.1.2
Section 7.1.3
Section 7.1.4
Section 7.1.5
Table 29
Section 7.1.6
Section 7.1.7
Section 7.1.8
Section 7.1.9
Section 7.1.10
Section 7.1.11
Section 7.1.12.1
Section 7.1.13
Section
Section 7.4.7
Section 7.1.15
Section 7.1.16
7.1.14,
5 of 71

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