TXC-03305AIPQ Transwitch Corporation, TXC-03305AIPQ Datasheet - Page 20

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TXC-03305AIPQ

Manufacturer Part Number
TXC-03305AIPQ
Description
Manufacturer
Transwitch Corporation
Datasheet

Specifications of TXC-03305AIPQ

Lead Free Status / RoHS Status
Not Compliant

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TXC-03305-MB
Ed. 4, September 2000
M13X
TXC-03305
TRANSMIT C-BIT INTERFACE
Symbol
CDCCT
CFMT
CCKT
CDT
Lead No.
BGA
R12
N12
T12
A5
Lead No.
PQFP
198
92
89
91
I/O/P
O
O
O
I
DATA SHEET
TTL8mA Transmit C-Bit Clock: A gapped clock signal is
TTL8mA Transmit C-Bit Framing Pulse: This positive fram-
TTL8mA Transmit Data Link Indication: A positive pulse
Type
TTL
- 20 -
provided for clocking in selected transmit C-bit data
(CDT). Data is clocked into the M13X on the rising
edges of CCKT.
Transmit C-Bit Data: The transmit gapped clock
(CCKT) is provided for clocking in the following C-
bits: C2, C3 (depending on the setting of bit 7 of
register 19H, C3CLKI), C4, C5, C6, C13, C14, C15,
C16, C17, C18, C19, C20, and C21. An unused C-
bit should be transmitted as a 1. C13, C14, and
C15 are sourced by the transmit PMDL controller
when it is enabled, even though the clock pulses for
C13, C14, and C15 are still present.
ing pulse occurs prior to the C2 bit.
that identifies the location of the three data link C-
bits (C13, C14, and C15). The transmit C-bit clock
(CCKT) may be and-gated with this signal to pro-
vide a gapped data link clock signal for PMDL appli-
cations where it is desired to use an external HDLC
controller instead of the on-chip HDLC controller,
such as in existing M13E device applications. This
signal is not needed if the internal HDLC controller
is used. This signal is enabled by placing a high on
the DLEN input signal lead.
Name/Function

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