TXC-03305AIPQ Transwitch Corporation, TXC-03305AIPQ Datasheet - Page 52

• Manufacturer Part Number: TXC-03305AIPQ
• Manufacturer: Transwitch Corporation

Specifications of TXC-03305AIPQ

• Lead Free Status / RoHS Status: Not Compliant

TXC-03305-MB
Ed. 4, September 2000
M13X
TXC-03305
received, aborted, received with bad FCS, or an invalid frame was received). When an interrupt occurs indicat-
ing a message has been received, the RX PMDL MESSAGE LENGTH register should be read. The message
length along with message status may be queued for processing later. The value in the RX PMDL FIFO
DEPTH register is not reset at the end of a message. When initializing the HDLC controller, the receive PMDL
FIFO must be read repeatedly until the depth value in the RX PMDL FIFO DEPTH register is zero. It should be
noted that messages with bad FCS or messages that were aborted must also be cleared from the receive
PMDL FIFO by the end user.
Invalid frames are detected and discarded. [Q.921] section 2.9 identifies and defines six different situations that
can be considered an invalid frame:
Items a-f below indicate how the requirements in items a-f directly above are implemented in the M13X:
a. A frame that is not properly bounded by two flags (i.e., a frame that violates a maximum or minimum
b. There are fewer than 6 octets between flags of frames that contain sequence numbers and fewer than five
c. The frame does not consist of an integral number of octets prior to bit insertion or following zero bit extrac-
d. The frame contains a frame check sequence error.
e. The frame contains a single octet address field.
f. The frame contains a service access point identifier ([Q.921] section 3.3.3) which is not supported by the
a. No hardware support is provided for detecting if received frames are too long. The M13X can accept
b. When a frame contains 4 or fewer octets, after destuffing, between its opening and closing flags:
c. When a receive
d. When a receive frame contains a frame check sequence error:
1. Transmit frames in the M13X are exempt from checking, since the transmit PMDL data are written into the
transmit PMDL FIFO as octets. Also, it is not expected that the transmit PMDL message stop transmitting on a
non-octet boundary. Therefore all transmit PMDL messages will default to an integral number of octets in length,
before stuffing.
length). The M13X will allow any length frame to be received, therefore it will be up to the end user’s soft-
ware to determine if the received frame is too long.
octets between flags of frames that do not contain sequence numbers (for the case of the M13X, unnum-
bered sequences are used, see Figure 26 in [T1.107] and sections 3.4 and 3.4.3 in [Q.921], therefore the
5 octet requirement applies to the M13X).
tion.
receiver.
frames of any length. Software can determine that the frame is too long and can read it out of the FIFO
and then chose to discard the data.
• The IRRHIS(2-0) interrupt request bits (bits 7-5 of register 2CH) are set to 111.
• The frame is written to the receive PMDL FIFO.
• The RX PMDL FIFO DEPTH register indicates the correct depth of the receive PMDL FIFO.
• The RX PMDL MESSAGE LENGTH register indicates the correct message length.
• An FCS error is not counted or declared.
• The IRRHIS(2-0) interrupt request bits (bits 7-5 of register 2CH) are set to 111.
• The frame is written to the receive PMDL FIFO, except for the partial byte.
• The RX PMDL FIFO DEPTH register indicates the correct depth of the receive PMDL FIFO.
• The RX PMDL MESSAGE LENGTH register indicates the correct message length.
• An FCS error is not counted or declared.
• The IRRHIS(2-0) interrupt request bits (bits 7-5 of register 2CH) are set to 011.
1
frame does not consist of an integral number of octets after the destuffing process:
DATA SHEET
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