NSK70721PE.C2 Intel, NSK70721PE.C2 Datasheet - Page 31
NSK70721PE.C2
Manufacturer Part Number
NSK70721PE.C2
Description
Manufacturer
Intel
Datasheet
1.NSK70721PE.C2.pdf
(82 pages)
Specifications of NSK70721PE.C2
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
28
Lead Free Status / RoHS Status
Supplier Unconfirmed
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3.1.6.8
Datasheet
Table 15. Main Status Register (RD0) (Continued)
RD1—AGC Tap Value Register
This register contains the eight most significant bits of the main FFE AGC tap. B7 is the sign bit
and is always equal 0. B0 the least significant bit.
The AGC Tap value can be used to calculate approximate Loop Loss (LL) as described in
Loss and SNR” on page
The AGC tap value is determined as follows:
In this equation Bi is the bit value of register RD1.
For example:
RD1 = 01100101 (65h)
AGC Tap = 1+0.5+0.0625+0.015625 = 1.578125.
Bit
B2
B1
B0
AGC Tap =
Deactivation Indicator (DEACTVTD). Set to 1 by EDSP to indicate expiration of the Deactivation
timer and the transition from the Pending Deactivation state to the Deactivated state.
•
•
Deactivation state.
•
•
process and entering into the Active state.
•
•
Link Active Indicator, (ACTIVE), active low. Set to 1 by EDSP upon entering into the Pending
Link Active Indicator, (ACTIVE), active high. Set to 1 by EDSP upon completion of activation
Address: A<3:0> = 0001
Default: xxh (x=undefined)
Attributes: Read Only.
Causes interrupt on changing from 0 to 1; masked by setting DEACTMSK = 1 in register WR2
Latched event; reset on read; with persistence while in the Deactivated state
Causes interrupt on changing from 0 to 1; masked by setting ACTBMSK = 1 in register WR2
Latched event; reset on read; with persistence while in the Pending Deactivation state
Causes interrupt on changing from 0 to 1; masked by setting ACTMSK = 1 in register WR2
Latched event; reset on read with persistence if still in Active state
Enhanced Multi-Rate DSL Data Pump Chip Set — SK70725/SK70721
i = 0
6
60.
Bi*2
i-6
Status Bit Descriptions
“Loop
31
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