NSK70721PE.C2 Intel, NSK70721PE.C2 Datasheet - Page 49

• Manufacturer Part Number: NSK70721PE.C2
• Manufacturer: Intel

Specifications of NSK70721PE.C2

• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 28
• Lead Free Status / RoHS Status: Supplier Unconfirmed

Datasheet
1
NOTE: T - Transparent signals, S - Scrambled signals.
ACT Bits
3
1. S0 = Two level (±3) signal
2. S1 = Four level (±3, ±1) signal
3. See
Mode
[3:0]
0000
0001
0010
RD5
Table 22. EMDP Mode Dependent Activation Signal State (Continued)
Table 23. Details of Activating State
1
2
Table 22
1
1
S0
S1
Active
Receiver
Pre-AGC
Inactive
Pre-EC
Signal
State
Xmit
The received data line from the EMDP is held high until the Active1 state is reached because the
receiver is not fully trained. Since low error rates cannot be achieved until training is completed,
data output is suppressed until the Active1 state is entered in accordance with industry standards.
The EMDP, like all Intel DSL Data Pumps, continuously adapts all receiver elements except the
AGC in the Active states. This allows the EMDP to perform well in the presence of significant
changes in line conditions.
In Independent and Transparent modes (0, 1, 2, 4, and 5) the presence of a FSW cannot be
guaranteed. In these modes the EMDP relies only on signal level and signal to noise ratio to move
to the Active state. In framed modes, modes 6 and 7, the EMDP searches for the FSW after
completing the 4 level detection process. When the FSW is detected in two consecutive frames the
device moves to the Active1 state.
The activating state is subdivided into a number of substates. In general the two Data Pumps act as
a synchronous machine, providing appropriate signals to the other end of the system during each
phase of the activation. Because reliable communications between the Data Pumps is not achieved
until the end of the activation process, it is not possible for the Data Pumps to signal each other that
a particular process has been completed. The absence of communications between the two Data
Pumps led to development of a means of synchronizing the operations of the two Data Pumps
which does not require communications between them.
The status of the Activating substates of the EMDP may be determined by reading the Activating
Status Register RD5 as shown in
monitor the progress of the training and activation sequence in each of the EMDPs.
for the source of the S0 and S1 signals. The source of the signals is mode dependent.
1
T
T
local signal present
State Description
canceler with only
Presets AGC with
Sign
only local signal
Scrambler Input
Pre-trains echo
Remains until
EMDP Master States
ACTREQ is
asserted
present
Enhanced Multi-Rate DSL Data Pump Chip Set — SK70725/SK70721
1
T
T
Mag
ACTREQ
Ends at
SMT1
SMT2
S
S
S
Sign
D/A Input
Table
0
S
S
Mag
Signal
23. The contents of the register RD5 may be used to
None
Xmit
S0
S0
On
On
On
Internal
Word
Sync
Receiver
Inactive
AAGC
State
Wait
On
On
On
EMDP Slave States
Stuffing
Internal
Trains analog AGC
State Description
Continues to train
signal is detected
Remains until S0
analog AGC
T1 Framed Mode
Name
Ends at
LOS=0
Mode
SMT2
SMT1
Signal
None
None
Xmit
S0
7
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