XC3SD3400A-4FGG676C Xilinx Inc, XC3SD3400A-4FGG676C Datasheet - Page 13

• Manufacturer Part Number: XC3SD3400A-4FGG676C
• Description: FPGA, SPARTAN-3A, DSP, 676FBGA
• Manufacturer: Xilinx Inc
• Series: Spartan™-3A DSPr

Specifications of XC3SD3400A-4FGG676C

• No. Of Logic Blocks: 5968
• No. Of Gates: 3400000
• No. Of Macrocells: 53712
• Family Type: Spartan-3A
• No. Of Speed Grades: 4
• Total Ram Bits: 2322432
• No. Of I/o's: 502
• Clock Management: DCM
• I/o Supply: RoHS Compliant
• Number Of Logic Elements/cells: 53712
• Number Of Labs/clbs: 5968
• Number Of I /o: 469
• Number Of Gates: 3400000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 676-BBGA
• Package: 676FBGA
• Family Name: Spartan®-3A
• Device Logic Units: 53712
• Device System Gates: 3400000
• Maximum Internal Frequency: 667 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 469
• Ram Bits: 2322432
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 122-1532 - KIT DEVELOPMENT SPARTAN 3ADSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 122-1539

Quiescent Current Requirements
Table 9: Quiescent Supply Current Characteristics
DS610 (v3.0) October 4, 2010
Product Specification
Notes:
1.
2.
3.
4.
5.
Symbol
I
I
CCAUXQ
CCINTQ
I
CCOQ
The numbers in this table are based on the conditions set forth in
Quiescent supply current is measured with all I/O drivers in a high-impedance state and with all pull-up/pull-down resistors at the I/O pads
disabled. Typical values are characterized using typical devices at room temperature (T
= 2.5V). The maximum limits are tested for each device at the respective maximum specified junction temperature and at maximum voltage
limits with V
with no functional elements instantiated). For conditions other than those described above (for example, a design including functional
elements), measured quiescent current levels will be different than the values in the table.
For more accurate estimates for a specific design, use the Xilinx XPower tools. There are two recommended ways to estimate the total power
consumption (quiescent plus dynamic) for a specific design: a) The
typical estimates, and does not require a netlist of the design. b) XPower Analyzer uses a netlist as input to provide maximum estimates as
well as more accurate typical estimates.
The maximum numbers in this table indicate the minimum current each power rail requires in order for the FPGA to power-on successfully.
For information on the power-saving Suspend mode, see XAPP480: Using Suspend Mode in Spartan-3 Generation FPGAs. Suspend mode
typically saves 40% total power consumption compared to quiescent current.
Quiescent V
Quiescent V
Quiescent V
CCINT
= 1.26V, V
Description
CCINT
CCO
CCAUX
supply current
supply current
supply current
CCO
= 3.6V, and V
CCAUX
XC3SD1800A
XC3SD3400A
XC3SD1800A
XC3SD3400A
XC3SD1800A
XC3SD3400A
Device
= 3.6V. The FPGA is programmed with a “blank” configuration data file (that is, a design
Spartan-3A DSP FPGA Family: DC and Switching Characteristics
www.xilinx.com
(1)
Power
Table
C,I
C,I
C,I
C,I
C,I
C,I
Spartan-3A DSP FPGA XPower Estimator
LI
LI
LI
LI
LI
LI
7.
Typical
0.4
0.2
0.4
0.2
41
36
64
55
25
24
39
38
(2)
J
of 25°C at V
Commercial
Maximum
390
550
130
90
–
–
4
–
4
–
–
–
CCINT
(2)
= 1.2V, V
provides quick, approximate,
Maximum
Industrial
CCO
500
175
725
300
110
160
105
72
5
5
5
5
= 3.3V, and V
(2)
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
CCAUX
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