XC3SD3400A-4FGG676C Xilinx Inc, XC3SD3400A-4FGG676C Datasheet - Page 76

• Manufacturer Part Number: XC3SD3400A-4FGG676C
• Description: FPGA, SPARTAN-3A, DSP, 676FBGA
• Manufacturer: Xilinx Inc
• Series: Spartan™-3A DSPr

Specifications of XC3SD3400A-4FGG676C

• No. Of Logic Blocks: 5968
• No. Of Gates: 3400000
• No. Of Macrocells: 53712
• Family Type: Spartan-3A
• No. Of Speed Grades: 4
• Total Ram Bits: 2322432
• No. Of I/o's: 502
• Clock Management: DCM
• I/o Supply: RoHS Compliant
• Number Of Logic Elements/cells: 53712
• Number Of Labs/clbs: 5968
• Number Of I /o: 469
• Number Of Gates: 3400000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 676-BBGA
• Package: 676FBGA
• Family Name: Spartan®-3A
• Device Logic Units: 53712
• Device System Gates: 3400000
• Maximum Internal Frequency: 667 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 469
• Ram Bits: 2322432
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 122-1532 - KIT DEVELOPMENT SPARTAN 3ADSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 122-1539

Table 66: Spartan-3A DSP FG676 Pinout for
XC3SD1800A FPGA (Cont’d)
DS610 (v3.0) October 4, 2010
Product Specification
Bank
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
IP_0/VREF_0
IO_L22P_0
IO_L21P_0
IO_L17P_0
IO_L11P_0
IO_L10N_0
IO_L05P_0
IO_L06P_0
IO_L44P_0
IO_L41N_0
IO_L42N_0
IO_L40P_0
IO_L34P_0
IO_L32P_0
IO_L30N_0
IO_L28N_0/GCLK11
IO_L22N_0
IO_L21N_0
IO_L19P_0
IO_L17N_0
IO_L11N_0
IO_L09P_0
IO_L05N_0
IO_L06N_0
IO_L51N_0
IO_L45N_0
IO_L41P_0
IO_L42P_0
IO_L38N_0
IO_L36N_0
IO_L33N_0
IO_L29N_0
IO_L28P_0/GCLK10
IO_L26P_0/GCLK6
IO_L23P_0
IO_L19N_0
IO_L18P_0
IO_L15P_0
IO_L14P_0/VREF_0
XC3SD1800A Pin Name
FG676
Ball
D14
D16
D17
D18
D20
D21
D22
D23
C10
C11
C12
C13
C15
C16
C17
C18
C20
C21
C22
C23
B10
B12
B13
B14
B15
B17
B18
B19
B20
C5
C6
C7
C8
B3
B4
B6
B7
B8
B9
VREF
GCLK
GCLK
GCLK
VREF
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
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Table 66: Spartan-3A DSP FG676 Pinout for
XC3SD1800A FPGA (Cont’d)
Bank
Spartan-3A DSP FPGA Family: Pinout Descriptions
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
IO_L09N_0
IO_L07P_0
IO_L51P_0
IO_L45P_0
IP_0
IO_L38P_0
IO_L36P_0
IO_L33P_0
IO_L29P_0
IP_0
IO_L26N_0/GCLK7
IO_L23N_0
IP_0
IO_L18N_0
IO_L15N_0
IO_L14N_0
IO_L07N_0
IP_0
IP_0
IP_0
IP_0
IP_0
IP_0
IP_0
IP_0
IP_0
IP_0
IP_0
IP_0
IP_0
IP_0
IP_0
IP_0
VCCO_0
VCCO_0
VCCO_0
VCCO_0
VCCO_0
VCCO_0
XC3SD1800A Pin Name
FG676
G16
G18
Ball
B21
B23
A10
A12
A13
A14
A15
A17
A18
A19
A20
A22
D15
D19
B24
A23
E20
A24
H11
H16
E13
E19
F10
F18
A3
A4
A7
A8
A9
E9
A5
E6
D5
C4
E8
B5
F9
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
GCLK
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
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