SAA7118E NXP Semiconductors, SAA7118E Datasheet - Page 115

• Manufacturer Part Number: SAA7118E
• Manufacturer: NXP Semiconductors

Specifications of SAA7118E

• Adc/dac Resolution: 9b
• Screening Level: Commercial
• Package Type: LBGA
• Pin Count: 156
• Lead Free Status / RoHS Status: Compliant

NXP Semiconductors
Table 57.
The polarity of any signal on RTS1 can be inverted via RTP1[11h[6]].
[1]
SAA7118_7
Product data sheet
RTS1 output
3-state
Constant LOW
CREF (13.5 MHz toggling pulse; see
CREF2 (6.75 MHz toggling pulse; see
HL; horizontal lock indicator
VL; vertical and horizontal lock:
DL; vertical and horizontal lock and color detected:
Reserved
HREF, horizontal reference signal; indicates 720 pixels valid data
on the expansion port. The positive slope marks the beginning of a
new active line. HREF is also generated during the vertical
blanking interval (see
HS:
HQ; HREF gated with VGATE
Reserved
V123; vertical sync; see vertical timing diagrams
Figure 32
VGATE; programmable via VSTA[8:0] 17h[0] 15h[7:0], VSTO[8:0]
17h[1] 16h[7:0] and VGPS[17h[2]]
Reserved
FID; position programmable via VSTA[8:0] 17h[0] 15h[7:0]; see
vertical timing diagrams
HL = 0: unlocked
HL = 1: locked
VL = 0: unlocked
VL = 1: locked
DL = 0: unlocked
DL = 1: locked
Programmable width in LLC8 steps via HSB[7:0] 06h[7:0] and
HSS[7:0] 07h[7:0]
Fine position adjustment in LLC2 steps via HDEL[1:0] 11h[5:4]
(see
Function of HL is selectable via HLSEL[13h[3]]:
HLSEL = 0: HL is standard horizontal lock indicator.
HLSEL = 1: HL is fast horizontal lock indicator (use is not recommended for sources with unstable time base e.g. VCRs).
Figure
and
RT signal control: RTS1 output; 12h[7:4]
34)
Figure 33
Figure
Figure 32
[1]
34).
:
and
Figure
Figure
Figure 33
34)
34)
Rev. 07 — 7 July 2008
Multistandard video decoder with adaptive comb filter
RTSE13
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
RTSE12
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
RTSE11
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
SAA7118
© NXP B.V. 2008. All rights reserved.
RTSE10
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
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