SAA7118E NXP Semiconductors, SAA7118E Datasheet - Page 121

• Manufacturer Part Number: SAA7118E
• Manufacturer: NXP Semiconductors

Specifications of SAA7118E

• Adc/dac Resolution: 9b
• Screening Level: Commercial
• Package Type: LBGA
• Pin Count: 156
• Lead Free Status / RoHS Status: Compliant

NXP Semiconductors
Table 68.
Table 69.
Table 70.
SAA7118_7
Product data sheet
Decimal
value
0...
...144
145...
...511
Decimal
value
0...
...144
145...
...511
Bit
D7
D6
D[5:4]
D3
Analog input control 6 (AICO6): static gain control channel 3; 23h[0] and 24h[7:0]
Analog input control 7 (AICO7): static gain control channel 4; 23h[1] and 25h[7:0]
Component delay/fast switch control; 29h[7:0]
Description
fast switch enable
fast switch input polarity if
FSWE = 1
static selection if FSWE = 0
fast switch input delay
adjustment relative to
component input signal
component luminance
peaking
10.3.2 Subaddress 24h
10.3.3 Subaddress 25h
10.3.4 Subaddress 29h
Gain
(dB)
0
0
+6
Gain
(dB)
0
0
+6
3
3
Sign bit
23h[0]
GAI38
0
0
0
1
Sign bit
23h[1]
GAI48
0
0
0
1
Control bits D7 to D0
GAI37
0
1
1
1
Control bits D7 to D0
GAI47
0
1
1
1
Symbol
FSWE
FSWI
FSWDL[1:0]
CMFI
GAI36
0
0
0
1
GAI46
0
0
0
1
Rev. 07 — 7 July 2008
GAI35
0
0
0
1
GAI45
0
0
0
1
Multistandard video decoder with adaptive comb filter
Value
0
1
0
1
0
1
00
01
10
11
0
1
GAI34
0
1
1
1
GAI44
0
1
1
1
Function
disabled
pixelwise switching between decoded CVBS signal
and component input signal is enabled (should
only be used for component sources synchronous
to CVBS input)
FSW = 0: decoded CVBS signal, FSW = 1:
component signal
FSW = 1: decoded CVBS signal, FSW = 0:
component signal
for modes 00h to 1Fh
for modes 20h to 3Fh
0 pixel (default)
+1 pixel
disabled
enabled (+1.5 dB at 5 MHz)
2 pixel
1 pixel
GAI33
0
0
0
1
GAI43
0
0
0
1
GAI32
0
0
0
1
GAI42
0
0
0
1
SAA7118
GAI31
0
0
0
1
GAI41
0
0
0
1
© NXP B.V. 2008. All rights reserved.
GAI30
0
0
1
1
GAI40
0
0
1
1
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