LPC47N227TQFP Standard Microsystems (SMSC), LPC47N227TQFP Datasheet - Page 164

• Manufacturer Part Number: LPC47N227TQFP
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LPC47N227TQFP

• Lead Free Status / RoHS Status: Not Compliant

SCE Address Decoding: address bits A[15:12] must be ‘0000’ to access Runtime Register Block
registers. A[3:0] are decoded as XXXXb.
CR31
CR31 can only be accessed in the configuration state and after the CSR has been initialized to 31H.
CR31 is GPIO Direction Register 1 and is used to select the direction of GP10-GP17 pins.
BIT NO.
BIT NO.
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
Type: R/W
BIT NAME
Type: R/W
BIT NAME
ADR10
ADR11
ADR4
ADR5
ADR6
ADR7
ADR8
ADR9
GP10
GP11
GP12
GP13
GP14
GP15
GP16
GP17
Runtime Registers Block Base Address
The bits in this register are used to program the location of the
Runtime Register Block Base Address.
The bits in this register are used to select the direction of the
GP10-GP17 pins.
0=Input
1=Output
GPIO Direction Register 1
Table 100 – CR30
Table 101 – CR31
164
DESCRIPTION
DESCRIPTION
Default: 0x00 on VCC POR
Default: 0x00 on VTR POR