STPCC5HEBC STMicroelectronics, STPCC5HEBC Datasheet - Page 36

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STPCC5HEBC

Manufacturer Part Number
STPCC5HEBC
Description
IC SYSTEM-ON-CHIP X86 388-PBGA
Manufacturer
STMicroelectronics
Series
-r
Datasheet

Specifications of STPCC5HEBC

Applications
Set-Top Boxes, TV
Core Processor
x86
Program Memory Type
External Program Memory
Controller Series
STPC® Consumer-II
Ram Size
External
Interface
EBI/EMI, I²C, IDE, ISA, Local Bus
Number Of I /o
-
Voltage - Supply
2.45 V ~ 3.6 V
Operating Temperature
0°C ~ 85°C
Mounting Type
*
Package / Case
*
Lead Free Status / RoHS Status
Not Compliant

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ELECTRICAL SPECIFICATIONS
4.5. AC CHARACTERISTICS
This section lists the AC characteristics of the
STPC interfaces including output delays, input
setup requirements, input hold requirements and
output float delays. These measurements are
based on the measurement points identified in
Figure 4-1
reference level VREF and other reference levels
Note: Refer to
36/93
CLK:
OUTPUTS:
INPUTS:
LEGEND:
Figure 4-1. Drive Level and Measurement Points for Switching Characteristics
Table 4-9. Drive Level and Measurement Points for Switching Characteristics
and
Symbol
V
V
V
Figure
REF
Figure
IHD
ILD
A - Maximum Output Delay Specification
B - Minimum Output Delay Specification
C - Minimum Input Setup Specification
D - Minimum Input Hold Specification
Valid
Output n
4-1.
4-2. The rising clock edge
B
A
Release 1.5 - January 29, 2002
MIN
Value
1.5
2.5
0.0
MAX
V
are shown in
signals must cross these levels during testing.
Figure 4-1
setup and hold times (C and D). Input setup and
hold times (C and D) are specified minimums,
defining the smallest acceptable sampling window
a synchronous input signal must be stable for
correct operation.
Ref
C
Valid
Output n+1
Valid
Input
Tx
shows output delay (A and B) and input
Table 4-9
D
below. Input or output
Units
V
V
V
V
V
V
Ref
ILD
IHD
V
V
V
Ref
ILD
IHD

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