STPCC5HEBC STMicroelectronics, STPCC5HEBC Datasheet - Page 71

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STPCC5HEBC

Manufacturer Part Number
STPCC5HEBC
Description
IC SYSTEM-ON-CHIP X86 388-PBGA
Manufacturer
STMicroelectronics
Series
-r
Datasheet

Specifications of STPCC5HEBC

Applications
Set-Top Boxes, TV
Core Processor
x86
Program Memory Type
External Program Memory
Controller Series
STPC® Consumer-II
Ram Size
External
Interface
EBI/EMI, I²C, IDE, ISA, Local Bus
Number Of I /o
-
Voltage - Supply
2.45 V ~ 3.6 V
Operating Temperature
0°C ~ 85°C
Mounting Type
*
Package / Case
*
Lead Free Status / RoHS Status
Not Compliant

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0
6.3.6. IPC
Most of the IPC signals are multiplexed: Interrupt
inputs, DMA Request inputs, DMA Acknowledge
outputs. The figure below describes a complete
implementation of the IRQ[15:0] time-multiplexing.
When the interface is integrated into the STPC,
the corresponding interrupt line can be grounded
as it is connected internally.
For example, if the integrated IDE controller is
activated, the IRQ[14] and IRQ[15] inputs can be
grounded.
Timer 0
Keyboard
Slave PIC
COM2/COM4
COM1/COM3
LPT2
Floppy
LPT1
RTC
Mouse
FPU
PCI / IDE
PCI / IDE
Figure 6-10. Typical IRQ multiplexing
ISA_CLK2X
ISA_CLK
Release 1.5 - January 29, 2002
IRQ[0]
IRQ[1]
IRQ[2]
IRQ[3]
IRQ[4]
IRQ[5]
IRQ[6]
IRQ[7]
IRQ[8]
IRQ[9]
IRQ[10]
IRQ[11]
IRQ[12]
IRQ[13]
IRQ[14]
IRQ[15]
Floppy
When an interrupt line is used internally, the
corresponding input can be grounded. In most of
the embedded designs, only few interrupts lines
are necessary and the glue logic can be simplified.
1C0
1C1
1C2
1C3
2C0
2C1
2C2
2C3
A
B
1C0
1C1
1C2
1C3
2C0
2C1
2C2
2C3
A
B
74x153
74x153
1G
1G
2G
2G
1Y
2Y
1Y
2Y
DESIGN GUIDELINES
IRQ_MUX[0]
IRQ_MUX[1]
IRQ_MUX[2]
IRQ_MUX[3]
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