STPCC5HEBC STMicroelectronics, STPCC5HEBC Datasheet - Page 72

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STPCC5HEBC

Manufacturer Part Number
STPCC5HEBC
Description
IC SYSTEM-ON-CHIP X86 388-PBGA
Manufacturer
STMicroelectronics
Series
-r
Datasheet

Specifications of STPCC5HEBC

Applications
Set-Top Boxes, TV
Core Processor
x86
Program Memory Type
External Program Memory
Controller Series
STPC® Consumer-II
Ram Size
External
Interface
EBI/EMI, I²C, IDE, ISA, Local Bus
Number Of I /o
-
Voltage - Supply
2.45 V ~ 3.6 V
Operating Temperature
0°C ~ 85°C
Mounting Type
*
Package / Case
*
Lead Free Status / RoHS Status
Not Compliant

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0
DESIGN GUIDELINES
The
implementation of the external glue logic for DMA
Request time-multiplexing and DMA Acknowledge
demultiplexing. Like for the interrupt lines, this
72/93
ISA, Refresh
ISA, PIO
ISA, FDC
ISA, PIO
Slave DMAC
ISA
ISA
ISA
figure
below
Figure 6-11. Typical DMA multiplexing and demultiplexing
describes
ISA_CLK2X
ISA_CLK
DMA_ENC[0]
DMA_ENC[1]
DMA_ENC[2]
a
Release 1.5 - January 29, 2002
complete
DRQ[0]
DRQ[1]
DRQ[2]
DRQ[3]
DRQ[4]
DRQ[5]
DRQ[6]
DRQ[7]
logic can be simplified when only few DMA
channels are used in the application.
This glue logic is not needed in Local bus mode as
it does not support DMA transfers.
1C0
1C1
1C2
1C3
2C0
2C1
2C2
2C3
A
B
A
B
C
G1
G2A
74x153
74x138
1G
G2B
2G
Y0#
Y1#
Y2#
Y3#
Y4#
Y5#
Y6#
Y7#
1Y
2Y
DACK0#
DACK1#
DACK2#
DACK3#
DACK5#
DACK6#
DACK7#
DREQ_MUX[0]
DREQ_MUX[1]

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