MC9S08GT60ACFDE Freescale, MC9S08GT60ACFDE Datasheet - Page 37

MC9S08GT60ACFDE

Manufacturer Part Number
MC9S08GT60ACFDE
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9S08GT60ACFDE

Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
40MHz
Interface Type
I2C/SCI/SPI
Total Internal Ram Size
4KB
# I/os (max)
39
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
1.8/2.08V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
QFN EP
Program Memory Type
Flash
Program Memory Size
60KB
Lead Free Status / RoHS Status
Compliant

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when the CPU executes a STOP instruction, the MCU will not enter any of the stop modes and an illegal
opcode reset is forced. The stop modes are selected by setting the appropriate bits in SPMSC2.
Table 3-1
1
2
3.6.1
The stop1 mode provides the lowest possible standby power consumption by causing the internal circuitry
of the MCU to be powered down. Stop1 can be entered only if the LVD circuit is not enabled in stop modes
(either LVDE or LVDSE not set).
When the MCU is in stop1 mode, all internal circuits that are powered from the voltage regulator are turned
off. The voltage regulator is in a low-power standby state, as is the ATD.
Exit from stop1 is performed by asserting either of the wake-up pins on the MCU: RESET or IRQ. IRQ is
always an active low input when the MCU is in stop1, regardless of how it was configured before entering
stop1.
Entering stop1 mode automatically asserts LVD. Stop1 cannot be exited until V
must rise above the LVI rearm voltage).
Upon wake-up from stop1 mode, the MCU will start up as from a power-on reset (POR). The CPU will
take the reset vector.
3.6.2
The stop2 mode provides very low standby power consumption and maintains the contents of RAM and
the current state of all of the I/O pins. Stop2 can be entered only if the LVD circuit is not enabled in stop
modes (either LVDE or LVDSE not set).
Before entering stop2 mode, the user must save the contents of the I/O port registers, as well as any other
memory-mapped registers they want to restore after exit of stop2, to locations in RAM. Upon exit of stop2,
these values can be restored by user software before pin latches are opened.
When the MCU is in stop2 mode, all internal circuits that are powered from the voltage regulator are turned
off, except for the RAM. The voltage regulator is in a low-power standby state, as is the ATD. Upon entry
Freescale Semiconductor
Mode
Stop1
Stop2
Stop3
Either ATD stop mode or power-down mode depending on the state of ATDPU.
Crystal oscillator can be configured to run in stop3. Please see the ICG registers.
summarizes the behavior of the MCU in each of the stop modes.
PDC
Stop1 Mode
Stop2 Mode
1
1
0
PPDC
Don’t
care
0
1
Peripherals,
CPU, Digital
Standby
Flash
Off
Off
Table 3-1. Stop Mode Behavior
MC9S08GB60A Data Sheet, Rev. 2
Standby
Standby
RAM
Off
ICG
Off
Off
Off
2
Disabled
Disabled
Disabled
ATD
1
Regulator
Standby
Standby
Off
DD
Chapter 3 Modes of Operation
> V
States held Optionally on
States held Optionally on
I/O Pins
Reset
LVDH/L
rising (V
RTI
Off
DD
37

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