MC68HC908QT2CPE Freescale, MC68HC908QT2CPE Datasheet - Page 102

• Manufacturer Part Number: MC68HC908QT2CPE
• Manufacturer: Freescale

Specifications of MC68HC908QT2CPE

• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 8MHz
• Total Internal Ram Size: 128Byte
• # I/os (max): 6
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 4-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 8
• Package Type: PDIP
• Program Memory Type: Flash
• Program Memory Size: 1.5KB
• Lead Free Status / RoHS Status: Compliant

Input/Output Ports (PORTS)
12.3.3 Port B Input Pullup Enable Register
The port B input pullup enable register (PTBPUE) contains a software configurable pullup device for each
of the eight port B pins. Each bit is individually configurable and requires the corresponding data direction
register, DDRBx, be configured as input. Each pullup device is automatically and dynamically disabled
when its corresponding DDRBx bit is configured as output.
PTBPUE[7:0] — Port B Input Pullup Enable Bits
102
Table 12-3
1. X = don’t care
2. I/O pin pulled to V
3. Writing affects data register, but does not affect input.
4. Hi-Z = high impedance
PTBPUE
These read/write bits are software programmable to enable pullup devices on port B pins
Bit
X
1
0
1 = Corresponding port B pin configured to have internal pull if its DDRB bit is set to 0
0 = Pullup device is disconnected on the corresponding port B pin regardless of the state of its
DDRB bit.
summarizes the operation of the port B pins.
Address: $000C
DDRB
Reset:
Read:
Write:
Bit
0
0
1
DD
Figure 12-8. Port B Input Pullup Enable Register (PTBPUE)
PTBPUE7
by internal pullup.
Bit 7
0
PTB
X
Bit
X
X
(1)
PTBPUE6
MC68HC908QY/QT Family Data Sheet, Rev. 6
Input, Hi-Z
6
0
Input, V
Table 12-3. Port B Pin Functions
I/O Pin
Output
Mode
PTBPUE5
DD
(2)
(4)
0
5
PTBPUE4
Accesses to DDRB
4
0
DDRB7–DDRB0
DDRB7–DDRB0
DDRB7–DDRB0
Read/Write
PTBPUE3
3
0
PTBPUE2
2
0
PTB7–PTB0
PTBPUE2
Read
Pin
Pin
1
0
Accesses to PTB
Freescale Semiconductor
PTBPUE0
Bit 0
0
PTB7–PTB0
PTB7–PTB0
PTB7–PTB0
Write
(3)
(3)